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[src/trunk]: src/share/man/man4 merge changes in FreeBSD.



details:   https://anonhg.NetBSD.org/src/rev/56a784c27c52
branches:  trunk
changeset: 483936:56a784c27c52
user:      soda <soda%NetBSD.org@localhost>
date:      Tue Mar 21 10:38:24 2000 +0000

description:
merge changes in FreeBSD.
XXX - supported hardware list is somewhat awful...

diffstat:

 share/man/man4/ahc.4 |  490 +++++++++++++++++++++++++++++++++++++++-----------
 1 files changed, 384 insertions(+), 106 deletions(-)

diffs (truncated from 594 to 300 lines):

diff -r 4fee75996f3b -r 56a784c27c52 share/man/man4/ahc.4
--- a/share/man/man4/ahc.4      Tue Mar 21 09:44:57 2000 +0000
+++ b/share/man/man4/ahc.4      Tue Mar 21 10:38:24 2000 +0000
@@ -1,6 +1,6 @@
-.\"    $NetBSD: ahc.4,v 1.13 2000/02/02 19:57:18 augustss Exp $
+.\"    $NetBSD: ahc.4,v 1.14 2000/03/21 10:38:24 soda Exp $
 .\"
-.\" Copyright (c) 1995, 1996 
+.\" Copyright (c) 1995, 1996, 1997, 1998, 2000
 .\"    Justin T. Gibbs.  All rights reserved.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
@@ -12,7 +12,7 @@
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
 .\" 3. The name of the author may not be used to endorse or promote products
-.\"    derived from this software withough specific prior written permission.
+.\"    derived from this software without specific prior written permission.
 .\"
 .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 .\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -25,20 +25,20 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
+.\" $FreeBSD: src/share/man/man4/ahc.4,v 1.22 2000/02/14 16:40:58 gibbs Exp $
 .\"
-.Dd April 20, 1996
-.\".Dt AHC 4 i386
-.\".Os FreeBSD
+.Dd February 13, 2000
 .Dt AHC 4
 .Os
+.\".Os FreeBSD
 .Sh NAME
 .Nm ahc
-.Nd Adaptec VL/EISA/PCI SCSI host adapter driver
+.Nd Adaptec VL/EISA/PCI/CardBus SCSI host adapter driver
 .Sh SYNOPSIS
 .ie 0 \{
 For one or more VL/EISA cards:
-.Cd controller eisa0
-.Cd controller ahc0
+.Cd device eisa
+.Cd device ahc
 \}
 \{For VL cards:
 .Cd ahc0 at isa? port ? irq ?
@@ -48,170 +48,448 @@
 .Pp
 .ie 0 \{
 For one or more PCI cards:
-.Cd controller pci0
-.Cd controller ahc0
+.Cd device pci
+.Cd device ahc
 \}
 \{For PCI cards:
-.Cd ahc* at pci? dev ? function ?\}
+.Cd ahc* at pci? dev ? function ?
 .Pp
-\{For CardBus cards:
+For CardBus cards:
 .Cd ahc* at cardbus? dev ? function ?\}
 .Pp
-To enable tagged queueing:
-.Cd options AHC_TAGENABLE
-.Pp
-To enable SCB paging:
-.Cd options AHC_SCBPAGING_ENABLE
+To allow PCI adapters to use memory mapped I/O if enabled:
+.Cd options AHC_ALLOW_MEMIO
 .Pp
+.if 0 \{
+To configure one or more controllers to assume the target role:
+.Cd options AHC_TMODE_ENABLE <bitmask of units>
+.Pp
+\}
 .ie 0 \{
-For one or more
-.Tn SCSI
-busses:
-.Cd controller scbus0 at ahc0
+For one or more SCSI busses:
+.Cd device scbus0 at ahc0
 \}
 \{For
 .Tn SCSI
 busses:
 .Cd scsibus* at ahc?\}
 .Sh DESCRIPTION
+.ie 0 \{
 This driver provides access to the
 .Tn SCSI
-bus connected to an
-.Tn Adaptec 
-274x, 284x, 2940, 3940, or controllers based on the
+bus(es) connected to Adaptec
 .Tn AIC7770,
 .Tn AIC7850,
 .Tn AIC7860,
 .Tn AIC7870,
-or
-.Tn AIC7880
+.Tn AIC7880,
+.Tn AIC7890,
+.Tn AIC7891,
+.Tn AIC7892,
+.Tn AIC7895,
+.Tn AIC7896,
+.Tn AIC7897
+and
+.Tn AIC7899
 host adapter chips.
-Features include support for twin and wide busses, ultra
-.Tn SCSI ,
-two active commands at a time per non-tagged queueing target, tagged queuing,
-and SCB paging which allows up to 255 active commands on all adapters
-except those using 
-.Tn AIC7770
-chips prior to revision E.
-Tagged queueing is enabled with the
-.Dq Dv AHC_TAGENABLE
+These chips are found on many motherboards as well as the following
+Adaptec SCSI controller cards:
+.Tn 274X(W),
+.Tn 274X(T),
+.Tn 284X,
+.Tn 2910,
+.Tn 2915,
+.Tn 2920,
+.Tn 2930C,
+.Tn 2930U2,
+.Tn 2940,
+.Tn 2940U,
+.Tn 2940AU,
+.Tn 2940UW,
+.Tn 2940UW Dual,
+.Tn 2940UW Pro,
+.Tn 2940U2W,
+.Tn 2940U2B,
+.Tn 2950U2W,
+.Tn 2950U2B,
+.Tn 19160B,
+.Tn 29160B,
+.Tn 29160N,
+.Tn 3940,
+.Tn 3940U,
+.Tn 3940AU,
+.Tn 3940UW,
+.Tn 3940AUW,
+.Tn 3940U2W,
+.Tn 3950U2,
+.Tn 3960,
+.Tn 39160,
+.Tn 3985,
+and
+.Tn 4944UW.
+\}
+\{The
+.Nm
+device driver supports
+.Tn SCSI
+controllers based on
+.Tn Adaptec 
+.Tn AIC77xx
+and
+.Tn AIC78xx
+.Tn SCSI
+host adapter chips found on many motherboards as well as
+.Tn Adaptec 
+.Tn SCSI
+controller cards.\}
+.Pp
+Driver features include support for twin and wide busses,
+fast, ultra or ultra2 synchronous transfers depending on controller type,
+.ie 0 \{
+tagged queuing, SCB paging, and target mode.
+\}
+\{
+tagged queuing and SCB paging.\}
+.Pp
+Memory mapped I/O can be enabled for PCI devices with the
+.Dq Dv AHC_ALLOW_MEMIO
 configuration option.
-SCB paging is enabled with the
-.Dq Dv AHC_SCBPAGING_ENABLE
-configuration option.
+Memory mapped I/O is more efficient than the alternative, programmed I/O.
+Most PCI BIOSes will map devices so that either technique for communicating
+with the card is available.
+In some cases,
+usually when the PCI device is sitting behind a PCI->PCI bridge,
+the BIOS may fail to properly initialize the chip for memory mapped I/O.
+The typical symptom of this problem is a system hang if memory mapped I/O
+is attempted.
+Most modern motherboards perform the initialization correctly and work fine
+with this option enabled.
 .Pp
+.if 0 \{
+Individual controllers may be configured to operate in the target role
+through the 
+.Dq Dv AHC_TMODE_ENABLE
+configuration option.  The value assigned to this option should be a bitmap
+of all units where target mode is desired.
+For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 
+.Pp
+\}
 Per target configuration performed in the 
 .Tn SCSI-Select
-menu, accesible at boot in 
+menu, accessible at boot
+in 
 .No non- Ns Tn EISA
-models or through an 
+models,
+or through an 
 .Tn EISA
 configuration utility for 
 .Tn EISA
 models,
-is honored by this driver with the stipulation that the 
-.Tn BIOS
-must be enabled for 
+is honored by this driver.
+This includes synchronous/asynchronous transfers,
+maximum synchronous negotiation rate,
+wide transfers,
+disconnection,
+the host adapter's SCSI ID,
+and,
+in the case of
 .Tn EISA
-adaptors.
-This includes synchronous/asynchronous transfers, maximum synchronous
-negotiation rate, disconnection, and the host adapter's SCSI ID.
+Twin Channel controllers,
+the primary channel selection.
+For systems that store non-volatile settings in a system specific manner
+rather than a serial eeprom directly connected to the aic7xxx controller,
+the 
+.Tn BIOS
+must be enabled for the driver to access this information.
+This restriction applies to all
+.Tn EISA
+and many motherboard configurations.
 .Pp
 Note that I/O addresses are determined automatically by the probe routines,
 but care should be taken when using a 284x
 .Pq Tn VESA No local bus controller
 in an
 .Tn EISA 
-system.
-Ensure that the jumpers setting the I/O area for the 284x match the 
+system.  The jumpers setting the I/O area for the 284x should match the 
 .Tn EISA
 slot into which the card is inserted to prevent conflicts with other
 .Tn EISA
 cards.
+.Pp
+Performance and feature sets vary throughout the aic7xxx product line.
+The following table provides a comparison of the different chips supported
+by the
+.Nm
+driver.  Note that wide and twin channel features, although always supported
+by a particular chip, may be disabled in a particular motherboard or card
+design.
+.Pp
+.Bd -filled -offset indent
+.Bl -column "aic7770 " "10 " "EISA/VL  " "10MHz " "16bit " "SCBs " Features
+.Em "Chip       MIPS    Bus      MaxSync   MaxWidth  SCBs  Features"
+aic7770     10    EISA/VL    10MHz     16Bit     4    1
+aic7850     10    PCI/32     10MHz      8Bit     3
+aic7860     10    PCI/32     20MHz      8Bit     3
+aic7870     10    PCI/32     10MHz     16Bit    16
+aic7880     10    PCI/32     20MHz     16Bit    16 
+aic7890     20    PCI/32     40MHz     16Bit    16        3 4 5 6 7 8
+aic7891     20    PCI/64     40MHz     16Bit    16        3 4 5 6 7 8
+aic7892     20    PCI/64     80MHz     16Bit    16        3 4 5 6 7 8
+aic7895     15    PCI/32     20MHz     16Bit    16      2 3 4 5
+aic7895C    15    PCI/32     20MHz     16Bit    16      2 3 4 5     8
+aic7896     20    PCI/32     40MHz     16Bit    16      2 3 4 5 6 7 8
+aic7897     20    PCI/64     40MHz     16Bit    16      2 3 4 5 6 7 8
+aic7899     20    PCI/64     80MHz     16Bit    16      2 3 4 5 6 7 8
+.El 
+.Pp
+.Bl -enum -compact
+.It
+Multiplexed Twin Channel Device - One controller servicing two busses.
+.It
+Multi-function Twin Channel Device - Two controllers on one chip.
+.It
+Command Channel Secondary DMA Engine - Allows scatter gather list and
+SCB prefetch.
+.It
+64 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA.
+.It
+Block Move Instruction Support - Doubles the speed of certain sequencer
+operations.
+.It



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