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[src/trunk]: src/sys/arch Move cpufunc stuff from arm32/arm32 to arm/arm. Th...
details: https://anonhg.NetBSD.org/src/rev/4b8d09e99907
branches: trunk
changeset: 509525:4b8d09e99907
user: bjh21 <bjh21%NetBSD.org@localhost>
date: Sun May 06 18:01:42 2001 +0000
description:
Move cpufunc stuff from arm32/arm32 to arm/arm. The only change involved is
to add recognition of the SA-1100 and SA-1110 for compatibility with hpcarm
(which is now using this code as well).
diffstat:
sys/arch/arm/arm/cpufunc.c | 1271 +++++++++++++++++++++++++++++++
sys/arch/arm/arm/cpufunc_asm.S | 808 +++++++++++++++++++
sys/arch/arm/conf/files.arm | 4 +-
sys/arch/arm32/arm32/cpufunc.c | 1270 ------------------------------
sys/arch/arm32/arm32/cpufunc_asm.S | 808 -------------------
sys/arch/arm32/conf/files.arm32 | 4 +-
sys/arch/dnard/conf/files.dnard | 4 +-
sys/arch/hpcarm/conf/files.hpcarm | 4 +-
sys/arch/hpcarm/hpcarm/cpufunc.c | 274 ------
sys/arch/hpcarm/hpcarm/cpufunc_asm.S | 496 ------------
sys/arch/netwinder/conf/files.netwinder | 4 +-
11 files changed, 2086 insertions(+), 2861 deletions(-)
diffs (truncated from 5041 to 300 lines):
diff -r 15926cba7d6b -r 4b8d09e99907 sys/arch/arm/arm/cpufunc.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/arm/cpufunc.c Sun May 06 18:01:42 2001 +0000
@@ -0,0 +1,1271 @@
+/* $NetBSD: cpufunc.c,v 1.1 2001/05/06 18:01:43 bjh21 Exp $ */
+
+/*
+ * arm8 support code Copyright (c) 1997 ARM Limited
+ * arm8 support code Copyright (c) 1997 Causality Limited
+ * Copyright (c) 1997 Mark Brinicombe.
+ * Copyright (c) 1997 Causality Limited
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Causality Limited.
+ * 4. The name of Causality Limited may not be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RiscBSD kernel project
+ *
+ * cpufuncs.c
+ *
+ * C functions for supporting CPU / MMU / TLB specific operations.
+ *
+ * Created : 30/01/97
+ */
+
+#include "opt_compat_netbsd.h"
+#include "opt_pmap_debug.h"
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <machine/cpu.h>
+#include <machine/cpufunc.h>
+#include <machine/bootconfig.h>
+#include <arch/arm/arm/disassem.h>
+
+#ifdef CPU_ARM6
+struct cpu_functions arm6_cpufuncs = {
+ /* CPU functions */
+
+ cpufunc_id, /* id */
+
+ /* MMU functions */
+
+ cpufunc_control, /* control */
+ cpufunc_domains, /* domain */
+ arm67_setttb, /* setttb */
+ cpufunc_faultstatus, /* faultstatus */
+ cpufunc_faultaddress, /* faultaddress */
+
+ /* TLB functions */
+
+ arm67_tlb_flush, /* tlb_flushID */
+ arm67_tlb_purge, /* tlb_flushID_SE */
+ arm67_tlb_flush, /* tlb_flushI */
+ arm67_tlb_purge, /* tlb_flushI_SE */
+ arm67_tlb_flush, /* tlb_flushD */
+ arm67_tlb_purge, /* tlb_flushD_SE */
+
+ /* Cache functions */
+
+ arm67_cache_flush, /* cache_flushID */
+ (void *)arm67_cache_flush, /* cache_flushID_SE */
+ arm67_cache_flush, /* cache_flushI */
+ (void *)arm67_cache_flush, /* cache_flushI_SE */
+ arm67_cache_flush, /* cache_flushD */
+ (void *)arm67_cache_flush, /* cache_flushD_SE */
+
+ cpufunc_nullop, /* cache_cleanID s*/
+ (void *)cpufunc_nullop, /* cache_cleanID_E s*/
+ cpufunc_nullop, /* cache_cleanD s*/
+ (void *)cpufunc_nullop, /* cache_cleanD_E */
+
+ arm67_cache_flush, /* cache_purgeID s*/
+ (void *)arm67_cache_flush, /* cache_purgeID_E s*/
+ arm67_cache_flush, /* cache_purgeD s*/
+ (void *)arm67_cache_flush, /* cache_purgeD_E s*/
+
+ /* Other functions */
+
+ cpufunc_nullop, /* flush_prefetchbuf */
+ cpufunc_nullop, /* drain_writebuf */
+ cpufunc_nullop, /* flush_brnchtgt_C */
+ (void *)cpufunc_nullop, /* flush_brnchtgt_E */
+
+ (void *)cpufunc_nullop, /* sleep */
+
+ /* Soft functions */
+
+ cpufunc_nullop, /* cache_syncI */
+ (void *)cpufunc_nullop, /* cache_cleanID_rng */
+ (void *)cpufunc_nullop, /* cache_cleanD_rng */
+ (void *)arm67_cache_flush, /* cache_purgeID_rng */
+ (void *)arm67_cache_flush, /* cache_purgeD_rng */
+ (void *)cpufunc_nullop, /* cache_syncI_rng */
+
+ arm6_dataabt_fixup, /* dataabt_fixup */
+ cpufunc_null_fixup, /* prefetchabt_fixup */
+
+ arm67_context_switch, /* context_switch */
+
+ arm6_setup /* cpu setup */
+
+};
+#endif /* CPU_ARM6 */
+
+#ifdef CPU_ARM7
+struct cpu_functions arm7_cpufuncs = {
+ /* CPU functions */
+
+ cpufunc_id, /* id */
+
+ /* MMU functions */
+
+ cpufunc_control, /* control */
+ cpufunc_domains, /* domain */
+ arm67_setttb, /* setttb */
+ cpufunc_faultstatus, /* faultstatus */
+ cpufunc_faultaddress, /* faultaddress */
+
+ /* TLB functions */
+
+ arm67_tlb_flush, /* tlb_flushID */
+ arm67_tlb_purge, /* tlb_flushID_SE */
+ arm67_tlb_flush, /* tlb_flushI */
+ arm67_tlb_purge, /* tlb_flushI_SE */
+ arm67_tlb_flush, /* tlb_flushD */
+ arm67_tlb_purge, /* tlb_flushD_SE */
+
+ /* Cache functions */
+
+ arm67_cache_flush, /* cache_flushID */
+ (void *)arm67_cache_flush, /* cache_flushID_SE */
+ arm67_cache_flush, /* cache_flushI */
+ (void *)arm67_cache_flush, /* cache_flushI_SE */
+ arm67_cache_flush, /* cache_flushD */
+ (void *)arm67_cache_flush, /* cache_flushD_SE */
+
+ cpufunc_nullop, /* cache_cleanID s*/
+ (void *)cpufunc_nullop, /* cache_cleanID_E s*/
+ cpufunc_nullop, /* cache_cleanD s*/
+ (void *)cpufunc_nullop, /* cache_cleanD_E */
+
+ arm67_cache_flush, /* cache_purgeID s*/
+ (void *)arm67_cache_flush, /* cache_purgeID_E s*/
+ arm67_cache_flush, /* cache_purgeD s*/
+ (void *)arm67_cache_flush, /* cache_purgeD_E s*/
+
+ /* Other functions */
+
+ cpufunc_nullop, /* flush_prefetchbuf */
+ cpufunc_nullop, /* drain_writebuf */
+ cpufunc_nullop, /* flush_brnchtgt_C */
+ (void *)cpufunc_nullop, /* flush_brnchtgt_E */
+
+ (void *)cpufunc_nullop, /* sleep */
+
+ /* Soft functions */
+
+ cpufunc_nullop, /* cache_syncI */
+ (void *)cpufunc_nullop, /* cache_cleanID_rng */
+ (void *)cpufunc_nullop, /* cache_cleanD_rng */
+ (void *)arm67_cache_flush, /* cache_purgeID_rng */
+ (void *)arm67_cache_flush, /* cache_purgeD_rng */
+ (void *)cpufunc_nullop, /* cache_syncI_rng */
+
+ arm7_dataabt_fixup, /* dataabt_fixup */
+ cpufunc_null_fixup, /* prefetchabt_fixup */
+
+ arm67_context_switch, /* context_switch */
+
+ arm7_setup /* cpu setup */
+
+};
+#endif /* CPU_ARM7 */
+
+#ifdef CPU_ARM8
+struct cpu_functions arm8_cpufuncs = {
+ /* CPU functions */
+
+ cpufunc_id, /* id */
+
+ /* MMU functions */
+
+ cpufunc_control, /* control */
+ cpufunc_domains, /* domain */
+ arm8_setttb, /* setttb */
+ cpufunc_faultstatus, /* faultstatus */
+ cpufunc_faultaddress, /* faultaddress */
+
+ /* TLB functions */
+
+ arm8_tlb_flushID, /* tlb_flushID */
+ arm8_tlb_flushID_SE, /* tlb_flushID_SE */
+ arm8_tlb_flushID, /* tlb_flushI */
+ arm8_tlb_flushID_SE, /* tlb_flushI_SE */
+ arm8_tlb_flushID, /* tlb_flushD */
+ arm8_tlb_flushID_SE, /* tlb_flushD_SE */
+
+ /* Cache functions */
+
+ arm8_cache_flushID, /* cache_flushID */
+ arm8_cache_flushID_E, /* cache_flushID_SE */
+ arm8_cache_flushID, /* cache_flushI */
+ arm8_cache_flushID_E, /* cache_flushI_SE */
+ arm8_cache_flushID, /* cache_flushD */
+ arm8_cache_flushID_E, /* cache_flushD_SE */
+
+ arm8_cache_cleanID, /* cache_cleanID s*/
+ arm8_cache_cleanID_E, /* cache_cleanID_E s*/
+ arm8_cache_cleanID, /* cache_cleanD s*/
+ arm8_cache_cleanID_E, /* cache_cleanD_E */
+
+ arm8_cache_purgeID, /* cache_purgeID s*/
+ arm8_cache_purgeID_E, /* cache_purgeID_E s*/
+ arm8_cache_purgeID, /* cache_purgeD s*/
+ arm8_cache_purgeID_E, /* cache_purgeD_E s*/
+
+ /* Other functions */
+
+ cpufunc_nullop, /* flush_prefetchbuf */
+ cpufunc_nullop, /* drain_writebuf */
+ cpufunc_nullop, /* flush_brnchtgt_C */
+ (void *)cpufunc_nullop, /* flush_brnchtgt_E */
+
+ (void *)cpufunc_nullop, /* sleep */
+
+ /* Soft functions */
+
+ (void *)cpufunc_nullop, /* cache_syncI */
+ (void *)arm8_cache_cleanID, /* cache_cleanID_rng */
+ (void *)arm8_cache_cleanID, /* cache_cleanD_rng */
+ (void *)arm8_cache_purgeID, /* cache_purgeID_rng */
+ (void *)arm8_cache_purgeID, /* cache_purgeD_rng */
+ (void *)cpufunc_nullop, /* cache_syncI_rng */
+
+ cpufunc_null_fixup, /* dataabt_fixup */
+ cpufunc_null_fixup, /* prefetchabt_fixup */
+
+ arm8_context_switch, /* context_switch */
+
+ arm8_setup /* cpu setup */
+};
+#endif /* CPU_ARM8 */
+
+#ifdef CPU_SA110
+struct cpu_functions sa110_cpufuncs = {
+ /* CPU functions */
+
+ cpufunc_id, /* id */
+
+ /* MMU functions */
+
+ cpufunc_control, /* control */
+ cpufunc_domains, /* domain */
+ sa110_setttb, /* setttb */
+ cpufunc_faultstatus, /* faultstatus */
+ cpufunc_faultaddress, /* faultaddress */
+
+ /* TLB functions */
+
+ sa110_tlb_flushID, /* tlb_flushID */
+ sa110_tlb_flushID_SE, /* tlb_flushID_SE */
+ sa110_tlb_flushI, /* tlb_flushI */
+ (void *)sa110_tlb_flushI, /* tlb_flushI_SE */
+ sa110_tlb_flushD, /* tlb_flushD */
+ sa110_tlb_flushD_SE, /* tlb_flushD_SE */
+
+ /* Cache functions */
+
+ sa110_cache_flushID, /* cache_flushID */
+ (void *)sa110_cache_flushID, /* cache_flushID_SE */
+ sa110_cache_flushI, /* cache_flushI */
+ (void *)sa110_cache_flushI, /* cache_flushI_SE */
+ sa110_cache_flushD, /* cache_flushD */
+ sa110_cache_flushD_SE, /* cache_flushD_SE */
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