[src/netbsd-1-5]: src/sys/dev/ic Pull up revisions 1.14-1.15 (requested by bo...

[he <he%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/445030e9ffc9
branches:  netbsd-1-5
changeset: 492630:445030e9ffc9
user:      he <he%NetBSD.org@localhost>
date:      Tue Jan 29 22:41:49 2002 +0000

description:
Pull up revisions 1.14-1.15 (requested by bouyer):
  Add support for the 53c1010-33, and bring documentation up to
  date.

diffstat:

 sys/dev/ic/siopvar.h |  7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diffs (26 lines):

diff -r 8ed567e38439 -r 445030e9ffc9 sys/dev/ic/siopvar.h
--- a/sys/dev/ic/siopvar.h      Tue Jan 29 22:41:33 2002 +0000
+++ b/sys/dev/ic/siopvar.h      Tue Jan 29 22:41:49 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: siopvar.h,v 1.8.2.2 2002/01/05 17:59:16 he Exp $       */
+/*     $NetBSD: siopvar.h,v 1.8.2.3 2002/01/29 22:41:49 he Exp $       */
 
 /*
  * Copyright (c) 2000 Manuel Bouyer.
@@ -82,13 +82,14 @@
 #define SF_BUS_DIFF    0x00000008 /* differential bus */
 
 #define SF_CHIP_LED0   0x00000100 /* led on GPIO0 */
-#define SF_CHIP_DBLR   0x00000200 /* clock doubler */
-#define SF_CHIP_QUAD   0x00000400 /* clock quadrupler */
+#define SF_CHIP_DBLR   0x00000200 /* clock doubler or quadrupler */
+#define SF_CHIP_QUAD   0x00000400 /* clock quadrupler, with PPL */
 #define SF_CHIP_FIFO   0x00000800 /* large fifo */
 #define SF_CHIP_PF     0x00001000 /* Intructions prefetch */
 #define SF_CHIP_RAM    0x00002000 /* on-board RAM */
 #define SF_CHIP_LS     0x00004000 /* load/store instruction */
 #define SF_CHIP_10REGS 0x00008000 /* 10 scratch registers */
+#define SF_CHIP_DFBC   0x00010000 /* Use DFBC register */
 
 #define SF_PCI_RL      0x01000000 /* PCI read line */
 #define SF_PCI_RM      0x02000000 /* PCI read multiple */