[src/trunk]: src/sys/arch/mips/include No need to protect headers with #ifdef...

[simonb <simonb%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/7ae2d0b6160e
branches:  trunk
changeset: 543107:7ae2d0b6160e
user:      simonb <simonb%NetBSD.org@localhost>
date:      Mon Feb 17 11:35:01 2003 +0000

description:
No need to protect headers with #ifdef _KERNEL if they're never installed
in /usr/include.

diffstat:

 sys/arch/mips/include/cache.h        |  5 +----
 sys/arch/mips/include/cache_mipsNN.h |  4 +---
 sys/arch/mips/include/cache_r3k.h    |  6 +-----
 sys/arch/mips/include/cache_r4k.h    |  6 +++---
 sys/arch/mips/include/cache_r5900.h  |  6 +++---
 sys/arch/mips/include/cache_tx39.h   |  6 +++---
 6 files changed, 12 insertions(+), 21 deletions(-)

diffs (141 lines):

diff -r c4bb39218c5b -r 7ae2d0b6160e sys/arch/mips/include/cache.h
--- a/sys/arch/mips/include/cache.h     Mon Feb 17 11:07:19 2003 +0000
+++ b/sys/arch/mips/include/cache.h     Mon Feb 17 11:35:01 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache.h,v 1.5 2002/12/17 12:04:29 simonb Exp $ */
+/*     $NetBSD: cache.h,v 1.6 2003/02/17 11:35:01 simonb Exp $ */
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -151,7 +151,6 @@
        void    (*mco_intern_sdcache_wb_range)(vaddr_t, vsize_t);
 };
 
-#ifdef _KERNEL
 extern struct mips_cache_ops mips_cache_ops;
 
 /* PRIMARY CACHE VARIABLES */
@@ -261,5 +260,3 @@
 void   mips_dcache_compute_align(void);
 
 #include <mips/cache_mipsNN.h>
-
-#endif /* _KERNEL */
diff -r c4bb39218c5b -r 7ae2d0b6160e sys/arch/mips/include/cache_mipsNN.h
--- a/sys/arch/mips/include/cache_mipsNN.h      Mon Feb 17 11:07:19 2003 +0000
+++ b/sys/arch/mips/include/cache_mipsNN.h      Mon Feb 17 11:35:01 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_mipsNN.h,v 1.3 2002/11/24 07:41:29 simonb Exp $  */
+/*     $NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $  */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -35,7 +35,6 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifdef _KERNEL
 void   mipsNN_cache_init(uint32_t, uint32_t);
 
 void   mipsNN_icache_sync_all_16(void);
@@ -54,4 +53,3 @@
 void   mipsNN_pdcache_inv_range_32(vaddr_t, vsize_t);
 void   mipsNN_pdcache_wb_range_16(vaddr_t, vsize_t);
 void   mipsNN_pdcache_wb_range_32(vaddr_t, vsize_t);
-#endif
diff -r c4bb39218c5b -r 7ae2d0b6160e sys/arch/mips/include/cache_r3k.h
--- a/sys/arch/mips/include/cache_r3k.h Mon Feb 17 11:07:19 2003 +0000
+++ b/sys/arch/mips/include/cache_r3k.h Mon Feb 17 11:35:01 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_r3k.h,v 1.2 2001/11/14 18:26:21 thorpej Exp $    */
+/*     $NetBSD: cache_r3k.h,v 1.3 2003/02/17 11:35:02 simonb Exp $     */
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -39,8 +39,6 @@
  * Cache definitions/operations for R3000-style caches.
  */
 
-#ifdef _KERNEL
-
 void   r3k_icache_sync_all(void);
 void   r3k_icache_sync_range(vaddr_t, vsize_t);
 
@@ -54,5 +52,3 @@
 
 int    r3k_picache_size(void);
 int    r3k_pdcache_size(void);
-
-#endif /* _KERNEL */
diff -r c4bb39218c5b -r 7ae2d0b6160e sys/arch/mips/include/cache_r4k.h
--- a/sys/arch/mips/include/cache_r4k.h Mon Feb 17 11:07:19 2003 +0000
+++ b/sys/arch/mips/include/cache_r4k.h Mon Feb 17 11:35:01 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_r4k.h,v 1.8 2002/11/17 06:40:43 simonb Exp $     */
+/*     $NetBSD: cache_r4k.h,v 1.9 2003/02/17 11:35:02 simonb Exp $     */
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -55,7 +55,7 @@
 #define        CACHEOP_R4K_HIT_WB              (6 << 2)        /* I, D, SD */
 #define        CACHEOP_R4K_HIT_SET_VIRTUAL     (7 << 2)        /* SI, SD */
 
-#if defined(_KERNEL) && !defined(_LOCORE)
+#if !defined(_LOCORE)
 
 /*
  * cache_r4k_op_line:
@@ -401,4 +401,4 @@
 void   r4k_sdcache_inv_range_generic(vaddr_t, vsize_t);
 void   r4k_sdcache_wb_range_generic(vaddr_t, vsize_t);
 
-#endif /* _KERNEL && !_LOCORE */
+#endif /* !_LOCORE */
diff -r c4bb39218c5b -r 7ae2d0b6160e sys/arch/mips/include/cache_r5900.h
--- a/sys/arch/mips/include/cache_r5900.h       Mon Feb 17 11:07:19 2003 +0000
+++ b/sys/arch/mips/include/cache_r5900.h       Mon Feb 17 11:35:01 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_r5900.h,v 1.3 2001/11/23 15:48:40 uch Exp $      */
+/*     $NetBSD: cache_r5900.h,v 1.4 2003/02/17 11:35:02 simonb Exp $   */
 
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -56,7 +56,7 @@
 #define CACHEOP_R5900_HWB_D            0x1c
                                        /* HIT WRITEBACK W/O INVALIDATE */
 
-#if defined(_KERNEL) && !defined(_LOCORE)
+#if !defined(_LOCORE)
 
 #define        cache_op_r5900_line_64(va, op)                                  \
 do {                                                                   \
@@ -144,4 +144,4 @@
 void   r5900_pdcache_inv_range_64(vaddr_t, vsize_t);
 void   r5900_pdcache_wb_range_64(vaddr_t, vsize_t);
 
-#endif /* _KERNEL && !_LOCORE */
+#endif /* !_LOCORE */
diff -r c4bb39218c5b -r 7ae2d0b6160e sys/arch/mips/include/cache_tx39.h
--- a/sys/arch/mips/include/cache_tx39.h        Mon Feb 17 11:07:19 2003 +0000
+++ b/sys/arch/mips/include/cache_tx39.h        Mon Feb 17 11:35:01 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_tx39.h,v 1.3 2002/03/05 14:08:07 simonb Exp $    */
+/*     $NetBSD: cache_tx39.h,v 1.4 2003/02/17 11:35:03 simonb Exp $    */
 
 /*-
  * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -59,7 +59,7 @@
 #define        CACHEOP_TX3920_HIT_WB           (6 << 2)        /* D */
 #define        CACHEOP_TX3920_ISTTAG           (7 << 2)        /* I, D */
 
-#if defined(_KERNEL) && !defined(_LOCORE)
+#if !defined(_LOCORE)
 
 /*
  * cache_tx39_op_line:
@@ -173,4 +173,4 @@
 void   tx3900_icache_do_inv_index_16(vaddr_t, vsize_t);
 void   tx3920_icache_do_inv_16(vaddr_t, vsize_t);
 
-#endif /* _KERNEL && !_LOCORE */
+#endif /* !_LOCORE */