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[src/trunk]: src/sys/arch/powerpc Changes/additions to support evbppc.
details: https://anonhg.NetBSD.org/src/rev/f253f723c94b
branches: trunk
changeset: 540292:f253f723c94b
user: scw <scw%NetBSD.org@localhost>
date: Mon Dec 09 12:28:12 2002 +0000
description:
Changes/additions to support evbppc.
diffstat:
sys/arch/powerpc/ibm4xx/dev/ibm405gp.c | 139 ++++
sys/arch/powerpc/include/ibm4xx/bus.h | 1038 ++++++++++++++++++++++++++++++++
sys/arch/powerpc/include/pte.h | 4 +-
3 files changed, 1180 insertions(+), 1 deletions(-)
diffs (truncated from 1201 to 300 lines):
diff -r 4bab910e66e6 -r f253f723c94b sys/arch/powerpc/ibm4xx/dev/ibm405gp.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/powerpc/ibm4xx/dev/ibm405gp.c Mon Dec 09 12:28:12 2002 +0000
@@ -0,0 +1,139 @@
+/* $NetBSD: ibm405gp.c,v 1.1 2002/12/09 12:28:12 scw Exp $ */
+
+/*
+ * Copyright 2001 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+
+#include <machine/bus.h>
+#include <dev/pci/pcivar.h>
+
+#include <powerpc/ibm4xx/ibm405gp.h>
+#include <powerpc/ibm4xx/dev/pcicreg.h>
+
+static bus_space_tag_t pcicfg_iot = ibm4xx_make_bus_space_tag(0, 0);
+static bus_space_handle_t pcicfg_ioh = 0;
+
+#define PCI0_MEM_BASE 0x80000000
+
+static void setup_pcicfg_window(void)
+{
+ if (pcicfg_ioh)
+ return;
+ if (bus_space_map(pcicfg_iot, IBM405GP_PCIL0_BASE, 0x40 , 0, &pcicfg_ioh))
+ panic("Cannot map PCI configuration registers");
+}
+
+/*
+ * Setup proper Local<->PCI mapping
+ * PCI memory window: 256M @ PCI0MEMBASE with direct memory translation
+ */
+void ibm4xx_setup_pci(void)
+{
+ pcitag_t tag;
+
+ setup_pcicfg_window();
+
+ /* Disable all three memory mappers */
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0x00000000); /* disabled */
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA, 0x00000000); /* disabled */
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA, 0x00000000); /* disabled */
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0x00000000); /* Can't really disable PTM1. */
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS, 0x00000000); /* disabled */
+
+
+ /* Setup memory map #0 */
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0xF0000001); /* 256M non-prefetchable, enabled */
+
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA, PCI0_MEM_BASE);
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA, PCI0_MEM_BASE);
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA, 0);
+
+ /* Configure PCI bridge */
+ tag = pci_make_tag(0, 0, 0, 0);
+ // x = pci_conf_read(0, tag, PCI0_CMD); /* Read PCI command register */
+ // pci_conf_write(0, tag, PCI0_CMD, x | MA | ME); /* enable bus mastering and memory space */
+
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0xF0000001); /* Enable PTM1 */
+ bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA, 0);
+ pci_conf_write(0, tag, PCIC_PTM1BAR, 0); /* Set up proper PCI->Local address base. Always enabled */
+ pci_conf_write(0, tag, PCIC_PTM2BAR, 0);
+}
+
+void ibm4xx_show_pci_map(void)
+{
+ paddr_t la, lm, pl, ph;
+ pcitag_t tag;
+
+ setup_pcicfg_window();
+
+ printf("Local -> PCI map\n");
+ la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA);
+ lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA);
+ pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA);
+ ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA);
+ printf("0: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
+ (lm & 2) ? "":"not ",
+ (lm & 1) ? "enabled":"disabled");
+ la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1LA);
+ lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA);
+ pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCILA);
+ ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCIHA);
+ printf("1: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
+ (lm & 2) ? "":"not ",
+ (lm & 1) ? "enabled":"disabled");
+ la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2LA);
+ lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA);
+ pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCILA);
+ ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCIHA);
+ printf("2: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
+ (lm & 2) ? "":"not ",
+ (lm & 1) ? "enabled":"disabled");
+ printf("PCI -> Local map\n");
+
+ tag = pci_make_tag(0, 0, 0, 0);
+ pl = pci_conf_read(0, tag, PCIC_PTM1BAR);
+ la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA);
+ lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS);
+ printf("1: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
+ (lm & 1)?"enabled":"disabled");
+ pl = pci_conf_read(0, tag, PCIC_PTM2BAR);
+ la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2LA);
+ lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS);
+ printf("2: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
+ (lm & 1)?"enabled":"disabled");
+}
diff -r 4bab910e66e6 -r f253f723c94b sys/arch/powerpc/include/ibm4xx/bus.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/powerpc/include/ibm4xx/bus.h Mon Dec 09 12:28:12 2002 +0000
@@ -0,0 +1,1038 @@
+/* $NetBSD: bus.h,v 1.1 2002/12/09 12:28:13 scw Exp $ */
+
+/*-
+ * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _IBM4XX_BUS_H_
+#define _IBM4XX_BUS_H_
+
+#include <machine/pio.h>
+
+/*
+ * Values for the ibm4xx bus space tag, not to be used directly by MI code.
+ */
+
+#define __BUS_SPACE_HAS_STREAM_METHODS
+
+#define IBM4XX_BUS_ADDR_MASK 0xfffff000
+#define IBM4XX_BUS_STRIDE_MASK 0x0000000f
+
+#define ibm4xx_make_bus_space_tag(addr, stride) \
+ (((addr) & IBM4XX_BUS_ADDR_MASK) | (stride))
+/* Mw may need to use tag as an offset to convert between bus-side and local addresses */
+#define __BA(t, h, o) ((void *)((h) + ((o) << ((t) & IBM4XX_BUS_STRIDE_MASK))))
+
+
+/*
+ * Bus address and size types
+ */
+typedef u_int32_t bus_addr_t;
+typedef u_int32_t bus_size_t;
+
+/*
+ * Access methods for bus resources and address space.
+ */
+typedef u_int32_t bus_space_tag_t;
+typedef u_int32_t bus_space_handle_t;
+
+/*
+ * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
+ * bus_size_t size, int flags, bus_space_handle_t *bshp);
+ *
+ * Map a region of bus space.
+ */
+
+#define BUS_SPACE_MAP_CACHEABLE 0x01
+#define BUS_SPACE_MAP_LINEAR 0x02
+#define BUS_SPACE_MAP_PREFETCHABLE 0x04
+
+static __inline int bus_space_map(bus_space_tag_t, bus_addr_t,
+ bus_size_t, int, bus_space_handle_t *);
+static __inline paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t,
+ off_t, int, int);
+static __inline void bus_space_read_region_1(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int8_t *, size_t);
+static __inline void bus_space_read_region_2(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int16_t *, size_t);
+static __inline void bus_space_read_region_4(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int32_t *, size_t);
+static __inline void bus_space_read_region_stream_2(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int16_t *, size_t);
+static __inline void bus_space_read_region_stream_4(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int32_t *, size_t);
+static __inline void bus_space_write_region_1(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, const u_int8_t *, size_t);
+static __inline void bus_space_write_region_2(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, const u_int16_t *, size_t);
+static __inline void bus_space_write_region_4(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, const u_int32_t *, size_t);
+static __inline void bus_space_write_region_stream_2(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, const u_int16_t *, size_t);
+static __inline void bus_space_write_region_stream_4(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, const u_int32_t *, size_t);
+static __inline void bus_space_set_multi_1(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int8_t, size_t);
+static __inline void bus_space_set_multi_2(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int16_t, size_t);
+static __inline void bus_space_set_multi_4(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int32_t, size_t);
+static __inline void bus_space_set_multi_stream_2(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int16_t, size_t);
+static __inline void bus_space_set_multi_stream_4(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int32_t, size_t);
+static __inline void bus_space_set_region_1(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int8_t, size_t);
+static __inline void bus_space_set_region_2(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int16_t, size_t);
+static __inline void bus_space_set_region_4(bus_space_tag_t,
+ bus_space_handle_t, bus_size_t, u_int32_t, size_t);
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