[src/trunk]: src/gnu/dist/gcc/gcc/config/arm Apply a patch from Richard Earns...

[scw <scw%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/eb0dd73b7ec6
branches:  trunk
changeset: 555198:eb0dd73b7ec6
user:      scw <scw%NetBSD.org@localhost>
date:      Tue Nov 11 12:04:13 2003 +0000

description:
Apply a patch from Richard Earnshaw which fixes a half-word load/store
codegen bug on armeb.

diffstat:

 gnu/dist/gcc/gcc/config/arm/arm.md |  14 +++++++++-----
 1 files changed, 9 insertions(+), 5 deletions(-)

diffs (69 lines):

diff -r 4aa7e5c05900 -r eb0dd73b7ec6 gnu/dist/gcc/gcc/config/arm/arm.md
--- a/gnu/dist/gcc/gcc/config/arm/arm.md        Tue Nov 11 11:43:45 2003 +0000
+++ b/gnu/dist/gcc/gcc/config/arm/arm.md        Tue Nov 11 12:04:13 2003 +0000
@@ -4275,7 +4275,7 @@
    (set (match_dup 2)
        (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
    ;; store the high byte
-   (set (match_dup 4) (subreg:QI (match_dup 2) 0))]    ;explicit subreg safe
+   (set (match_dup 4) (match_dup 5))]
   "TARGET_ARM"
   "
   {
@@ -4291,7 +4291,8 @@
     operands[1] = adjust_address (operands[1], QImode, 0);
     operands[3] = gen_lowpart (QImode, operands[0]);
     operands[0] = gen_lowpart (SImode, operands[0]);
-    operands[2] = gen_reg_rtx (SImode); 
+    operands[2] = gen_reg_rtx (SImode);
+    operands[5] = gen_lowpart (QImode, operands[2]);
   }"
 )
 
@@ -4299,7 +4300,7 @@
   [(set (match_dup 4) (match_dup 3))
    (set (match_dup 2)
        (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
-   (set (match_operand 1 "" "")        (subreg:QI (match_dup 2) 3))]
+   (set (match_operand 1 "" "")        (match_dup 5))]
   "TARGET_ARM"
   "
   {
@@ -4316,13 +4317,14 @@
     operands[3] = gen_lowpart (QImode, operands[0]);
     operands[0] = gen_lowpart (SImode, operands[0]);
     operands[2] = gen_reg_rtx (SImode);
+    operands[5] = gen_lowpart (QImode, operands[2]);
   }"
 )
 
 ;; Subroutine to store a half word integer constant into memory.
 (define_expand "storeinthi"
   [(set (match_operand 0 "" "")
-       (subreg:QI (match_operand 1 "" "") 0))
+       (match_operand 1 "" ""))
    (set (match_dup 3) (match_dup 2))]
   "TARGET_ARM"
   "
@@ -4363,6 +4365,7 @@
     operands[3] = adjust_address (op0, QImode, 1);
     operands[0] = adjust_address (operands[0], QImode, 0);
     operands[2] = gen_lowpart (QImode, operands[2]);
+    operands[1] = gen_lowpart (QImode, operands[1]);
   }"
 )
 
@@ -4683,11 +4686,12 @@
    (set (match_dup 3)
        (ashiftrt:SI (match_dup 2) (const_int 16)))
    (set (match_operand:HI 0 "s_register_operand" "")
-       (subreg:HI (match_dup 3) 0))]
+       (match_dup 4))]
   "TARGET_ARM"
   "
   operands[2] = gen_reg_rtx (SImode);
   operands[3] = gen_reg_rtx (SImode);
+  operands[4] = gen_lowpart (HImode, operands[3]);
   "
 )