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[src/trunk]: src/sys/dev/ic Fix rx buffer size bitmask, do not explicitly set...
details: https://anonhg.NetBSD.org/src/rev/b83a228248ab
branches: trunk
changeset: 552351:b83a228248ab
user: martin <martin%NetBSD.org@localhost>
date: Tue Sep 23 19:37:39 2003 +0000
description:
Fix rx buffer size bitmask, do not explicitly set burst length and use 1536
bytes buffers, so this driver can finally cope with full size ethernet
packets. From Peter Bex.
diffstat:
sys/dev/ic/mtd803.c | 11 +++++------
sys/dev/ic/mtd803var.h | 14 +++++++-------
2 files changed, 12 insertions(+), 13 deletions(-)
diffs (75 lines):
diff -r 94fe31f67ef2 -r b83a228248ab sys/dev/ic/mtd803.c
--- a/sys/dev/ic/mtd803.c Tue Sep 23 18:54:24 2003 +0000
+++ b/sys/dev/ic/mtd803.c Tue Sep 23 19:37:39 2003 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mtd803.c,v 1.3 2003/07/14 15:47:12 lukem Exp $ */
+/* $NetBSD: mtd803.c,v 1.4 2003/09/23 19:37:39 martin Exp $ */
/*-
*
@@ -51,7 +51,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mtd803.c,v 1.3 2003/07/14 15:47:12 lukem Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mtd803.c,v 1.4 2003/09/23 19:37:39 martin Exp $");
#include "bpfilter.h"
@@ -216,8 +216,7 @@
*/
MTD_WRITE_4(sc, MTD_BCR, MTD_BCR_BLEN16);
- MTD_WRITE_4(sc, MTD_RXTXR, MTD_TX_STFWD | MTD_RX_BLEN | MTD_RX_512
- | MTD_TX_FDPLX);
+ MTD_WRITE_4(sc, MTD_RXTXR, MTD_TX_STFWD | MTD_TX_FDPLX);
/* Promiscuous mode? */
if (ifp->if_flags & IFF_PROMISC)
@@ -464,8 +463,8 @@
continue;
} else if (tlen > MTD_TXBUF_SIZE) {
/* XXX FIXME: No idea what to do here. */
- printf("%s: packet too large!\n",
- sc->dev.dv_xname);
+ printf("%s: packet too large! Size = %i\n",
+ sc->dev.dv_xname, tlen);
MFREE(m, n);
continue;
}
diff -r 94fe31f67ef2 -r b83a228248ab sys/dev/ic/mtd803var.h
--- a/sys/dev/ic/mtd803var.h Tue Sep 23 18:54:24 2003 +0000
+++ b/sys/dev/ic/mtd803var.h Tue Sep 23 19:37:39 2003 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mtd803var.h,v 1.1 2002/11/07 21:57:00 martin Exp $ */
+/* $NetBSD: mtd803var.h,v 1.2 2003/09/23 19:37:39 martin Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -45,11 +45,11 @@
/* Number of Tx and Rx descriptors */
-#define MTD_NUM_TXD 128
-#define MTD_NUM_RXD 128
+#define MTD_NUM_TXD 64
+#define MTD_NUM_RXD 64
/* Tx and Rx buffer size */
-#define MTD_RXBUF_SIZE 768
-#define MTD_TXBUF_SIZE 768
+#define MTD_RXBUF_SIZE 1536
+#define MTD_TXBUF_SIZE 1536
/* DMA mem must be longword (4 bytes) aligned */
#define MTD_DMA_ALIGN 4
@@ -132,8 +132,8 @@
#define MTD_RXD_RXERR 0x00000004 /* Receive error */
#define MTD_RXD_RSRVD0 0x00000003 /* Bits [1:0] are reserved */
/* Configuration register */
-#define MTD_RXD_CONF_RSRVD0 0xfffffc00 /* Bits [31:11] are reserved */
-#define MTD_RXD_CONF_BUFS 0x000003ff /* Receive buffer size */
+#define MTD_RXD_CONF_RSRVD0 0xfffff800 /* Bits [31:11] are reserved */
+#define MTD_RXD_CONF_BUFS 0x000007ff /* Receive buffer size */
#define MTD_RXD_FLEN_SHIFT 16
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