[src/trunk]: src/sys/arch/vax/vax CPU support for the 6000/400 CPU. No suppor...

[ragge <ragge%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/084313a3c739
branches:  trunk
changeset: 494466:084313a3c739
user:      ragge <ragge%NetBSD.org@localhost>
date:      Thu Jul 06 17:40:00 2000 +0000

description:
CPU support for the 6000/400 CPU. No support for spinning up the
slave processor yet, though.

diffstat:

 sys/arch/vax/vax/ka6400.c |  451 ++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 451 insertions(+), 0 deletions(-)

diffs (truncated from 455 to 300 lines):

diff -r 5098dbd6cc0e -r 084313a3c739 sys/arch/vax/vax/ka6400.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/vax/vax/ka6400.c Thu Jul 06 17:40:00 2000 +0000
@@ -0,0 +1,451 @@
+/*     $NetBSD: ka6400.c,v 1.1 2000/07/06 17:40:00 ragge Exp $ */
+
+/*
+ * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed at Ludd, University of
+ *      Lule}, Sweden and its contributors.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * KA6400 specific CPU code.
+ */
+/*
+ * TODO:
+ *     - Machine check code
+ *     - Vector processor code
+ */
+
+#include "opt_multiprocessor.h"
+
+#include <sys/param.h>
+#include <sys/time.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/conf.h>
+
+#include <machine/ka670.h>
+#include <machine/cpu.h>
+#include <machine/mtpr.h>
+#include <machine/nexus.h>
+#include <machine/clock.h>
+#include <machine/scb.h>
+#include <machine/bus.h>
+#include <machine/sid.h>
+#include <machine/cca.h>
+#include <machine/rpb.h>
+
+#include <dev/xmi/xmireg.h>
+#include <dev/xmi/xmivar.h>
+
+#include "ioconf.h"
+#include "locators.h"
+
+static int *rssc;
+struct cca *cca;
+
+static int ka6400_match(struct device *, struct cfdata *, void *);
+static void ka6400_attach(struct device *, struct device *, void*);
+static void ka6400_memerr(void);
+static void ka6400_conf(void);
+static int ka6400_mchk(caddr_t);
+static void ka6400_steal_pages(void);
+#if defined(MULTIPROCESSOR)
+static void ka6400_startslave(struct device *, struct cpu_info *);
+static void ka6400_txrx(int, char *, int);
+static void ka6400_sendstr(int, char *);
+static void ka6400_sergeant(int);
+static int rxchar(void);
+static void ka6400_putc(int);
+static void ka6400_cnintr(void);
+cons_decl(gen);
+#endif
+
+struct cpu_dep ka6400_calls = {
+       ka6400_steal_pages,
+       ka6400_mchk,
+       ka6400_memerr,
+       ka6400_conf,
+       generic_clkread,
+       generic_clkwrite,
+       6,      /* ~VUPS */
+       16,     /* SCB pages */
+       0,
+       0,
+       0,
+       0,
+       0,
+#if defined(MULTIPROCESSOR)
+       ka6400_startslave,
+#endif
+};
+
+struct ka6400_softc {
+       struct device sc_dev;
+       struct cpu_info *sc_ci;
+       int sc_nodeid;          /* CPU node ID */
+};
+
+struct cfattach cpu_xmi_ca = {
+       sizeof(struct ka6400_softc), ka6400_match, ka6400_attach
+};
+
+static int
+ka6400_match(struct device *parent, struct cfdata *cf, void *aux)
+{
+       struct xmi_attach_args *xa = aux;
+
+       if (bus_space_read_2(xa->xa_iot, xa->xa_ioh, XMI_TYPE) != XMIDT_KA64)
+               return 0;
+
+       if (cf->cf_loc[XMICF_NODE] != XMICF_NODE_DEFAULT &&
+           cf->cf_loc[XMICF_NODE] != xa->xa_nodenr)
+               return 0;
+
+       return 1;
+}
+
+static void
+ka6400_attach(struct device *parent, struct device *self, void *aux)
+{
+       struct ka6400_softc *sc = (void *)self;
+       struct xmi_attach_args *xa = aux;
+       int vp;
+
+       vp = (cca->cca_vecenab & (1 << xa->xa_nodenr));
+       printf("\n%s: ka6400 (%s) rev %d%s\n", self->dv_xname,
+           mastercpu == xa->xa_nodenr ? "master" : "slave",
+           bus_space_read_4(xa->xa_iot, xa->xa_ioh, XMI_TYPE) >> 16,
+           (vp ? ", vector processor present" : ""));
+
+       sc->sc_nodeid = xa->xa_nodenr;
+
+       if (xa->xa_nodenr != mastercpu) {
+#if defined(MULTIPROCESSOR)
+               sc->sc_ci = cpu_slavesetup(self);
+               v_putc = ka6400_putc;   /* Need special console handling */
+#endif
+               return;
+       }
+
+       mtpr(0, PR_VPSR); /* Can't use vector processor */
+       curcpu()->ci_dev = self;
+}
+
+void
+ka6400_conf()
+{
+       int mapaddr;
+
+       rssc = (void *)vax_map_physmem(RSSC_ADDR, 1);
+       mastercpu = rssc[RSSC_IPORT/4] & 15;
+       mapaddr = (cca ? (int)cca : rpb.cca_addr);
+       cca = (void *)vax_map_physmem(mapaddr, vax_btoc(sizeof(struct cca)));
+}
+
+/*
+ * MS62 support.
+ * This code should:
+ *     1: Be completed.
+ *     2: (eventually) move to dev/xmi/; it is used by Mips also.
+ */
+#define MEMRD(reg) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg))
+#define MEMWR(reg, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val))
+
+#define MS62_TYPE      0
+#define MS62_XBE       4
+#define MS62_SEADR     16
+#define        MS62_CTL1       20
+#define MS62_ECCERR    24
+#define MS62_ECCEA     28
+#define MS62_ILK0      32
+#define MS62_ILK1      36
+#define MS62_ILK2      40
+#define MS62_ILK3      44
+#define MS62_CTL2      48
+
+static int ms6400_match(struct device *, struct cfdata *, void *);
+static void ms6400_attach(struct device *, struct device *, void*);
+
+struct mem_xmi_softc {
+       struct device sc_dev;
+       bus_space_tag_t sc_iot;
+       bus_space_handle_t sc_ioh;
+};
+
+struct cfattach mem_xmi_ca = {
+       sizeof(struct mem_xmi_softc), ms6400_match, ms6400_attach
+};
+
+static int
+ms6400_match(struct device *parent, struct cfdata *cf, void *aux)
+{
+       struct xmi_attach_args *xa = aux;
+
+       if (bus_space_read_2(xa->xa_iot, xa->xa_ioh, XMI_TYPE) != XMIDT_MS62)
+               return 0;
+
+       if (cf->cf_loc[XMICF_NODE] != XMICF_NODE_DEFAULT &&
+           cf->cf_loc[XMICF_NODE] != xa->xa_nodenr)
+               return 0;
+
+       return 1;
+}
+
+static void
+ms6400_attach(struct device *parent, struct device *self, void *aux)
+{
+       struct mem_xmi_softc *sc = (void *)self;
+       struct xmi_attach_args *xa = aux;
+
+       sc->sc_iot = xa->xa_iot;
+       sc->sc_ioh = xa->xa_ioh;
+       printf("\n%s: MS62, rev %d, size 32MB\n", self->dv_xname,
+           MEMRD(MS62_TYPE) >> 16);
+}
+
+static void
+ka6400_memerr()
+{
+       printf("ka6400_memerr\n");
+}
+
+struct mc6400frame {
+       int     mc64_summary;           /* summary parameter */
+       int     mc64_va;                /* va register */
+       int     mc64_vb;                /* memory address */
+       int     mc64_sisr;              /* status word */
+       int     mc64_state;             /* error pc */
+       int     mc64_sc;                /* micro pc */
+       int     mc64_pc;                /* current pc */
+       int     mc64_psl;               /* current psl */
+};
+
+static int
+ka6400_mchk(caddr_t cmcf)
+{
+       return (MCHK_PANIC);
+}
+
+#if defined(MULTIPROCESSOR)
+#define RXBUF  80
+static char rxbuf[RXBUF];
+static int got = 0, taken = 0;
+static int expect = 0;
+#endif
+#if 0
+/*
+ * Receive a character from logical console.
+ */
+static void
+rxcdintr(void *arg)
+{
+       int c = mfpr(PR_RXCD);
+
+       if (c == 0)
+               return;
+
+#if defined(MULTIPROCESSOR)
+       if ((c & 0xff) == 0) {
+               if (curcpu()->ci_flags & CI_MASTERCPU)
+                       ka6400_cnintr();
+               return;
+       }
+
+       if (expect == ((c >> 8) & 0xf))
+               rxbuf[got++] = c & 0xff;
+
+       if (got == RXBUF)
+               got = 0;
+#endif
+}
+#endif
+
+/*
+ * From ka670, which has the same cache structure.
+ */
+static void
+ka6400_enable_cache(void)
+{
+       mtpr(KA670_PCS_REFRESH, PR_PCSTS);      /* disable primary cache */
+       mtpr(mfpr(PR_PCSTS), PR_PCSTS);         /* clear error flags */
+       mtpr(8, PR_BCCTL);                      /* disable backup cache */