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[src/netbsd-1-6]: src/sys/dev/pci Pull up revision 1.3 (requested by thorpej ...



details:   https://anonhg.NetBSD.org/src/rev/4a1cb7a804f2
branches:  netbsd-1-6
changeset: 529300:4a1cb7a804f2
user:      tron <tron%NetBSD.org@localhost>
date:      Fri Nov 08 08:50:42 2002 +0000

description:
Pull up revision 1.3 (requested by thorpej in ticket #650):
Add support for the new i82540, i82545, and i82546 Gig-E chips.  The
i82546 chip has 2 Gig-E interfaces in a single chip.
The main difference is these chips have a special handshaking protocol
for accessing the EEPROM (due to the shared nature on the i82546).

diffstat:

 sys/dev/pci/if_wmreg.h |  9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diffs (30 lines):

diff -r 1ccf4a3cb368 -r 4a1cb7a804f2 sys/dev/pci/if_wmreg.h
--- a/sys/dev/pci/if_wmreg.h    Fri Nov 08 08:50:24 2002 +0000
+++ b/sys/dev/pci/if_wmreg.h    Fri Nov 08 08:50:42 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wmreg.h,v 1.1.6.1 2002/07/15 16:14:01 thorpej Exp $ */
+/*     $NetBSD: if_wmreg.h,v 1.1.6.2 2002/11/08 08:50:42 tron Exp $    */
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -201,6 +201,8 @@
 #define        STATUS_LU       (1U << 1)       /* link up */
 #define        STATUS_TCKOK    (1U << 2)       /* Tx clock running */
 #define        STATUS_RBCOK    (1U << 3)       /* Rx clock running */
+#define        STATUS_FUNCID_SHIFT 2           /* 82546 function ID */
+#define        STATUS_FUNCID_MASK  3           /* ... */
 #define        STATUS_TXOFF    (1U << 4)       /* Tx paused */
 #define        STATUS_TBIMODE  (1U << 5)       /* fiber mode (Livengood) */
 #define        STATUS_SPEED(x) ((x) << 6)      /* speed indication */
@@ -225,6 +227,11 @@
 #define        EECD_FWE(x)     ((x) << 4)      /* flash write enable control */
 #define        EECD_FWE_DISABLED EECD_FWE(1)
 #define        EECD_FWE_ENABLED  EECD_FWE(2)
+#define        EECD_EE_REQ     (1U << 6)       /* (shared) EEPROM request */
+#define        EECD_EE_GNT     (1U << 7)       /* (shared) EEPROM grant */
+#define        EECD_EE_PRES    (1U << 8)       /* EEPROM present */
+#define        EECD_EE_SIZE    (1U << 9)       /* EEPROM size
+                                          (0 = 64 word, 1 = 256 word) */
 
 #define        UWIRE_OPC_ERASE 0x04            /* MicroWire "erase" opcode */
 #define        UWIRE_OPC_WRITE 0x05            /* MicroWire "write" opcode */



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