Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/dev/pci quick 'n dirty port of FreeBSD's Alteon Gigabit ...
details: https://anonhg.NetBSD.org/src/rev/a0a02b577f25
branches: trunk
changeset: 475975:a0a02b577f25
user: drochner <drochner%NetBSD.org@localhost>
date: Wed Sep 01 11:47:46 1999 +0000
description:
quick 'n dirty port of FreeBSD's Alteon Gigabit Ethernet driver.
todo:
-IPv6
-clean up jumbo buffer allocation - NetBSD provides an opaque argument
to the free function, thus doesn't need the hack done here
-deal correctly with the mapping of the shared memory
diffstat:
sys/dev/pci/if_ti.c | 2756 +++++++++++++++++++++++++++++
sys/dev/pci/if_tireg.h | 1157 ++++++++++++
sys/dev/pci/ti_fw.h | 4461 ++++++++++++++++++++++++++++++++++++++++++++++++
sys/dev/pci/ti_fw2.h | 4366 ++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 12740 insertions(+), 0 deletions(-)
diffs (truncated from 12756 to 300 lines):
diff -r 00c7074f9ede -r a0a02b577f25 sys/dev/pci/if_ti.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/pci/if_ti.c Wed Sep 01 11:47:46 1999 +0000
@@ -0,0 +1,2756 @@
+/* $NetBSD: if_ti.c,v 1.1 1999/09/01 11:47:46 drochner Exp $ */
+
+/*
+ * Copyright (c) 1997, 1998, 1999
+ * Bill Paul <wpaul%ctr.columbia.edu@localhost>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Bill Paul.
+ * 4. Neither the name of the author nor the names of any co-contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * FreeBSD Id: if_ti.c,v 1.15 1999/08/14 15:45:03 wpaul Exp
+ */
+
+/*
+ * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD.
+ * Manuals, sample driver and firmware source kits are available
+ * from http://www.alteon.com/support/openkits.
+ *
+ * Written by Bill Paul <wpaul%ctr.columbia.edu@localhost>
+ * Electrical Engineering Department
+ * Columbia University, New York City
+ */
+
+/*
+ * The Alteon Networks Tigon chip contains an embedded R4000 CPU,
+ * gigabit MAC, dual DMA channels and a PCI interface unit. NICs
+ * using the Tigon may have anywhere from 512K to 2MB of SRAM. The
+ * Tigon supports hardware IP, TCP and UCP checksumming, multicast
+ * filtering and jumbo (9014 byte) frames. The hardware is largely
+ * controlled by firmware, which must be loaded into the NIC during
+ * initialization.
+ *
+ * The Tigon 2 contains 2 R4000 CPUs and requires a newer firmware
+ * revision, which supports new features such as extended commands,
+ * extended jumbo receive ring desciptors and a mini receive ring.
+ *
+ * Alteon Networks is to be commended for releasing such a vast amount
+ * of development material for the Tigon NIC without requiring an NDA
+ * (although they really should have done it a long time ago). With
+ * any luck, the other vendors will finally wise up and follow Alteon's
+ * stellar example.
+ *
+ * The firmware for the Tigon 1 and 2 NICs is compiled directly into
+ * this driver by #including it as a C header file. This bloats the
+ * driver somewhat, but it's the easiest method considering that the
+ * driver code and firmware code need to be kept in sync. The source
+ * for the firmware is not provided with the FreeBSD distribution since
+ * compiling it requires a GNU toolchain targeted for mips-sgi-irix5.3.
+ *
+ * The following people deserve special thanks:
+ * - Terry Murphy of 3Com, for providing a 3c985 Tigon 1 board
+ * for testing
+ * - Raymond Lee of Netgear, for providing a pair of Netgear
+ * GA620 Tigon 2 boards for testing
+ * - Ulf Zimmermann, for bringing the GA260 to my attention and
+ * convincing me to write this driver.
+ * - Andrew Gallatin for providing FreeBSD/Alpha support.
+ */
+
+#include "bpfilter.h"
+#if 0
+#include "vlan.h"
+#endif
+#include "opt_inet.h"
+#include "opt_ns.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/sockio.h>
+#include <sys/mbuf.h>
+#include <sys/malloc.h>
+#include <sys/kernel.h>
+#include <sys/socket.h>
+#include <sys/queue.h>
+#include <sys/device.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/if_ether.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+
+#if NBPFILTER > 0
+#include <net/bpf.h>
+#endif
+
+#if 0
+#if NVLAN > 0
+#include <net/if_types.h>
+#include <net/if_vlan_var.h>
+#endif
+#endif
+
+#ifdef INET
+#include <netinet/in.h>
+#include <netinet/if_inarp.h>
+#endif
+
+#if 0
+#include <vm/vm.h> /* for vtophys */
+#include <vm/pmap.h> /* for vtophys */
+#include <machine/clock.h> /* for DELAY */
+#endif
+#include <machine/bus.h>
+#if 0
+#include <machine/resource.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+#endif
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <dev/pci/if_tireg.h>
+#include <dev/pci/ti_fw.h>
+#include <dev/pci/ti_fw2.h>
+
+#ifdef M_HWCKSUM
+/*#define TI_CSUM_OFFLOAD*/
+#endif
+
+#define bootverbose 1
+
+/*
+ * Various supported device vendors/types and their names.
+ */
+
+static struct ti_type ti_devs[] = {
+ { PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_ACENIC,
+ "Alteon AceNIC Gigabit Ethernet" },
+ { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C985,
+ "3Com 3c985-SX Gigabit Ethernet" },
+ { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_GA620,
+ "Netgear GA620 Gigabit Ethernet" },
+ { PCI_VENDOR_SGI, PCI_PRODUCT_SGI_TIGON,
+ "Silicon Graphics Gigabit Ethernet" },
+ { 0, 0, NULL }
+};
+
+static int ti_probe __P((struct device *, struct cfdata *, void *));
+static void ti_attach __P((struct device *, struct device *, void *));
+#if 0
+static int ti_detach __P((device_t));
+#endif
+static void ti_txeof __P((struct ti_softc *));
+static void ti_rxeof __P((struct ti_softc *));
+
+static void ti_stats_update __P((struct ti_softc *));
+static int ti_encap __P((struct ti_softc *, struct mbuf *,
+ u_int32_t *));
+
+static int ti_intr __P((void *));
+static void ti_start __P((struct ifnet *));
+static int ti_ioctl __P((struct ifnet *, u_long, caddr_t));
+static void ti_init __P((void *));
+static void ti_init2 __P((struct ti_softc *));
+static void ti_stop __P((struct ti_softc *));
+static void ti_watchdog __P((struct ifnet *));
+#if 0
+static void ti_shutdown __P((device_t));
+#endif
+static int ti_ifmedia_upd __P((struct ifnet *));
+static void ti_ifmedia_sts __P((struct ifnet *, struct ifmediareq *));
+
+static u_int32_t ti_eeprom_putbyte __P((struct ti_softc *, int));
+static u_int8_t ti_eeprom_getbyte __P((struct ti_softc *,
+ int, u_int8_t *));
+static int ti_read_eeprom __P((struct ti_softc *, caddr_t, int, int));
+
+static void ti_add_mcast __P((struct ti_softc *, struct ether_addr *));
+static void ti_del_mcast __P((struct ti_softc *, struct ether_addr *));
+static void ti_setmulti __P((struct ti_softc *));
+
+static void ti_mem __P((struct ti_softc *, u_int32_t,
+ u_int32_t, caddr_t));
+static void ti_loadfw __P((struct ti_softc *));
+static void ti_cmd __P((struct ti_softc *, struct ti_cmd_desc *));
+static void ti_cmd_ext __P((struct ti_softc *, struct ti_cmd_desc *,
+ caddr_t, int));
+static void ti_handle_events __P((struct ti_softc *));
+static int ti_alloc_jumbo_mem __P((struct ti_softc *));
+static void *ti_jalloc __P((struct ti_softc *));
+static void ti_jfree __P((caddr_t, u_int, void *));
+#if 0
+static void ti_jref __P((caddr_t, u_int));
+#endif
+static int ti_newbuf_std __P((struct ti_softc *, int, struct mbuf *, bus_dmamap_t));
+static int ti_newbuf_mini __P((struct ti_softc *, int, struct mbuf *, bus_dmamap_t));
+static int ti_newbuf_jumbo __P((struct ti_softc *, int, struct mbuf *));
+static int ti_init_rx_ring_std __P((struct ti_softc *));
+static void ti_free_rx_ring_std __P((struct ti_softc *));
+static int ti_init_rx_ring_jumbo __P((struct ti_softc *));
+static void ti_free_rx_ring_jumbo __P((struct ti_softc *));
+static int ti_init_rx_ring_mini __P((struct ti_softc *));
+static void ti_free_rx_ring_mini __P((struct ti_softc *));
+static void ti_free_tx_ring __P((struct ti_softc *));
+static int ti_init_tx_ring __P((struct ti_softc *));
+
+static int ti_64bitslot_war __P((struct ti_softc *));
+static int ti_chipinit __P((struct ti_softc *));
+static int ti_gibinit __P((struct ti_softc *));
+
+static int ti_ether_ioctl __P((struct ifnet *, u_long, caddr_t));
+
+struct cfattach ti_ca = {
+ sizeof(struct ti_softc), ti_probe, ti_attach
+};
+
+/*
+ * Send an instruction or address to the EEPROM, check for ACK.
+ */
+static u_int32_t ti_eeprom_putbyte(sc, byte)
+ struct ti_softc *sc;
+ int byte;
+{
+ register int i, ack = 0;
+
+ /*
+ * Make sure we're in TX mode.
+ */
+ TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
+
+ /*
+ * Feed in each bit and stobe the clock.
+ */
+ for (i = 0x80; i; i >>= 1) {
+ if (byte & i) {
+ TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT);
+ } else {
+ TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT);
+ }
+ DELAY(1);
+ TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
+ DELAY(1);
+ TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
+ }
+
+ /*
+ * Turn off TX mode.
+ */
+ TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
+
+ /*
+ * Check for ack.
+ */
+ TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
+ ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN;
+ TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
+
+ return(ack);
+}
+
+/*
+ * Read a byte of data stored in the EEPROM at address 'addr.'
+ * We have to send two address bytes since the EEPROM can hold
+ * more than 256 bytes of data.
+ */
+static u_int8_t ti_eeprom_getbyte(sc, addr, dest)
+ struct ti_softc *sc;
+ int addr;
+ u_int8_t *dest;
+{
+ register int i;
+ u_int8_t byte = 0;
+
+ EEPROM_START;
+
+ /*
+ * Send write control code to EEPROM.
+ */
+ if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) {
+ printf("%s: failed to send write command, status: %x\n",
Home |
Main Index |
Thread Index |
Old Index