[src/trunk]: src/sys/dev/ic Fix incorrect uint8_t vs. u_int8_t usage. Add in ...

[mjacob <mjacob%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/253913bf1495
branches:  trunk
changeset: 494356:253913bf1495
user:      mjacob <mjacob%NetBSD.org@localhost>
date:      Wed Jul 05 22:26:53 2000 +0000

description:
Fix incorrect uint8_t vs. u_int8_t usage. Add in offset macros for outgoing
mailbox regs and a INT_PENDING_MASK macro.

diffstat:

 sys/dev/ic/ispreg.h |  44 ++++++++++++++++++++++++++------------------
 1 files changed, 26 insertions(+), 18 deletions(-)

diffs (79 lines):

diff -r df08b62f2b8c -r 253913bf1495 sys/dev/ic/ispreg.h
--- a/sys/dev/ic/ispreg.h       Wed Jul 05 22:25:53 2000 +0000
+++ b/sys/dev/ic/ispreg.h       Wed Jul 05 22:26:53 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ispreg.h,v 1.20 2000/05/13 16:53:04 he Exp $ */
+/* $NetBSD: ispreg.h,v 1.21 2000/07/05 22:26:53 mjacob Exp $ */
 /* release_6_5_99 */
 /*
  * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration
@@ -227,6 +227,9 @@
 #define        INT_PENDING(isp, isr)   (IS_FC(isp)? \
        ((isr & BIU2100_ISR_RISC_INT) != 0) : ((isr & BIU_ISR_RISC_INT) != 0))
 
+#define        INT_PENDING_MASK(isp)   \
+       (IS_FC(isp)? BIU2100_ISR_RISC_INT: BIU_ISR_RISC_INT)
+
 /* BUS SEMAPHORE REGISTER */
 #define        BIU_SEMA_STATUS         0x0002  /* Semaphore Status Bit */
 #define        BIU_SEMA_LOCK           0x0001  /* Semaphore Lock Bit */
@@ -339,10 +342,15 @@
 #define        OUTMAILBOX6     (MBOX_BLOCK+0xC)
 #define        OUTMAILBOX7     (MBOX_BLOCK+0xE)
 
-#define        OMBOX_OFFN(n)   (MBOX_BLOCK + (n * 2))
+#define        MBOX_OFF(n)     (MBOX_BLOCK + ((n) << 1))
 #define        NMBOX(isp)      \
        (((((isp)->isp_type & ISP_HA_SCSI) >= ISP_HA_SCSI_1040A) || \
         ((isp)->isp_type & ISP_HA_FC))? 8 : 6)
+#define        NMBOX_BMASK(isp)        \
+       (((((isp)->isp_type & ISP_HA_SCSI) >= ISP_HA_SCSI_1040A) || \
+        ((isp)->isp_type & ISP_HA_FC))? 0xff : 0x3f)
+
+#define        MAX_MAILBOX     8
 
 /*
  * SXP Block Register Offsets
@@ -701,26 +709,26 @@
 
 /* Offset 5 */
 /*
-       uint8_t bios_configuration_mode     :2;
-       uint8_t bios_disable                :1;
-       uint8_t selectable_scsi_boot_enable :1;
-       uint8_t cd_rom_boot_enable          :1;
-       uint8_t disable_loading_risc_code   :1;
-       uint8_t enable_64bit_addressing     :1;
-       uint8_t unused_7                    :1;
+       u_int8_t bios_configuration_mode     :2;
+       u_int8_t bios_disable                :1;
+       u_int8_t selectable_scsi_boot_enable :1;
+       u_int8_t cd_rom_boot_enable          :1;
+       u_int8_t disable_loading_risc_code   :1;
+       u_int8_t enable_64bit_addressing     :1;
+       u_int8_t unused_7                    :1;
  */
 
 /* Offsets 6, 7 */
 /*
-        uint8_t boot_lun_number    :5;
-        uint8_t scsi_bus_number    :1;
-        uint8_t unused_6           :1;
-        uint8_t unused_7           :1;
-        uint8_t boot_target_number :4;
-        uint8_t unused_12          :1;
-        uint8_t unused_13          :1;
-        uint8_t unused_14          :1;
-        uint8_t unused_15          :1;
+        u_int8_t boot_lun_number    :5;
+        u_int8_t scsi_bus_number    :1;
+        u_int8_t unused_6           :1;
+        u_int8_t unused_7           :1;
+        u_int8_t boot_target_number :4;
+        u_int8_t unused_12          :1;
+        u_int8_t unused_13          :1;
+        u_int8_t unused_14          :1;
+        u_int8_t unused_15          :1;
  */
 
 #define        ISP1080_NVRAM_HBA_ENABLE(c)                     ISPBSMX(c, 16, 3, 0x01)