[src/trunk]: src/sys/arch/arm/xscale In the interrupt dispatch loop, make sur...

[scw <scw%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/3abd4e8b6462
branches:  trunk
changeset: 555879:3abd4e8b6462
user:      scw <scw%NetBSD.org@localhost>
date:      Wed Dec 03 13:20:34 2003 +0000

description:
In the interrupt dispatch loop, make sure to handle any pending interrupts
which came in while we were dealing with the first interrupt(s), and which
are enabled at the current spl.

This fixes a problem where the intr_enabled/hw mask is not updated to
allow pending interrupts through until the next splx(). In some case,
interrupts could be delayed until the next clock tick.

diffstat:

 sys/arch/arm/xscale/ixp425_intr.c |  10 ++++++++--
 1 files changed, 8 insertions(+), 2 deletions(-)

diffs (31 lines):

diff -r bc7a0814868e -r 3abd4e8b6462 sys/arch/arm/xscale/ixp425_intr.c
--- a/sys/arch/arm/xscale/ixp425_intr.c Wed Dec 03 13:12:53 2003 +0000
+++ b/sys/arch/arm/xscale/ixp425_intr.c Wed Dec 03 13:20:34 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ixp425_intr.c,v 1.7 2003/10/08 19:46:12 scw Exp $ */
+/*     $NetBSD: ixp425_intr.c,v 1.8 2003/12/03 13:20:34 scw Exp $ */
 
 /*
  * Copyright (c) 2003
@@ -68,7 +68,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp425_intr.c,v 1.7 2003/10/08 19:46:12 scw Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_intr.c,v 1.8 2003/12/03 13:20:34 scw Exp $");
 
 #ifndef EVBARM_SPL_NOINLINE
 #define        EVBARM_SPL_NOINLINE
@@ -530,6 +530,12 @@
                /* Re-enable this interrupt now that's it's cleared. */
                intr_enabled |= ibit;
                ixp425_set_intrmask();
+
+               /*
+                * Don't forget to include interrupts which may have
+                * arrived in the meantime.
+                */
+               hwpend |= ((ixp425_ipending & IXP425_INT_HWMASK) & ~pcpl);
        }
 
        /* Check for pendings soft intrs. */