Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch/prep Back out last changes.



details:   https://anonhg.NetBSD.org/src/rev/ccd7b971fa82
branches:  trunk
changeset: 511415:ccd7b971fa82
user:      nonaka <nonaka%NetBSD.org@localhost>
date:      Tue Jun 19 11:56:27 2001 +0000

description:
Back out last changes.

diffstat:

 sys/arch/prep/include/bootinfo.h  |  10 +----
 sys/arch/prep/include/intr.h      |   4 +-
 sys/arch/prep/pci/pci_machdep.c   |  25 ++++----------
 sys/arch/prep/prep/cpu.c          |  45 +++------------------------
 sys/arch/prep/prep/extintr.c      |  18 +++-------
 sys/arch/prep/prep/machdep.c      |  52 ++++++++----------------------
 sys/arch/prep/stand/boot/Makefile |   4 +-
 sys/arch/prep/stand/boot/boot.c   |  20 ++---------
 sys/arch/prep/stand/boot/boot.h   |  65 +++++++++++++++++---------------------
 sys/arch/prep/stand/boot/version  |   3 +-
 10 files changed, 71 insertions(+), 175 deletions(-)

diffs (truncated from 526 to 300 lines):

diff -r b541c1c154c6 -r ccd7b971fa82 sys/arch/prep/include/bootinfo.h
--- a/sys/arch/prep/include/bootinfo.h  Tue Jun 19 11:36:17 2001 +0000
+++ b/sys/arch/prep/include/bootinfo.h  Tue Jun 19 11:56:27 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bootinfo.h,v 1.2 2001/06/17 15:57:12 nonaka Exp $      */
+/*     $NetBSD: bootinfo.h,v 1.3 2001/06/19 11:56:27 nonaka Exp $      */
 
 /*
  * Copyright (c) 1997
@@ -43,7 +43,6 @@
 #define BTINFO_RESIDUAL        0
 #define BTINFO_CONSOLE 1
 #define BTINFO_CLOCK   2
-#define BTINFO_MODEL   3
 
 struct btinfo_residual {
        struct btinfo_common common;
@@ -62,13 +61,8 @@
        int ticks_per_sec;
 };
 
-struct btinfo_model {
-       struct btinfo_common common;
-       int model;
-};
-
 #ifdef _KERNEL
-void *lookup_bootinfo(int);
+void *lookup_bootinfo __P((int));
 #endif
 
 #define BOOTINFO_MAXSIZE       0xd0
diff -r b541c1c154c6 -r ccd7b971fa82 sys/arch/prep/include/intr.h
--- a/sys/arch/prep/include/intr.h      Tue Jun 19 11:36:17 2001 +0000
+++ b/sys/arch/prep/include/intr.h      Tue Jun 19 11:56:27 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intr.h,v 1.8 2001/06/17 15:57:12 nonaka Exp $  */
+/*     $NetBSD: intr.h,v 1.9 2001/06/19 11:56:27 nonaka Exp $  */
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -105,8 +105,6 @@
 extern struct intrhand *intrhand[];
 extern int intrtype[];
 
-extern paddr_t prep_intr_reg;
-
 /*
  *  Reorder protection in the following inline functions is
  * achived with the "eieio" instruction which the assembler
diff -r b541c1c154c6 -r ccd7b971fa82 sys/arch/prep/pci/pci_machdep.c
--- a/sys/arch/prep/pci/pci_machdep.c   Tue Jun 19 11:36:17 2001 +0000
+++ b/sys/arch/prep/pci/pci_machdep.c   Tue Jun 19 11:56:27 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_machdep.c,v 1.11 2001/06/17 15:57:13 nonaka Exp $  */
+/*     $NetBSD: pci_machdep.c,v 1.12 2001/06/19 11:56:27 nonaka Exp $  */
 
 /*
  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
@@ -49,8 +49,8 @@
 
 #define _POWERPC_BUS_DMA_PRIVATE
 #include <machine/bus.h>
+#include <machine/pio.h>
 #include <machine/intr.h>
-#include <machine/preptype.h>
 
 #include <dev/isa/isavar.h>
 #include <dev/pci/pcivar.h>
@@ -224,22 +224,13 @@
 
                        /* Fixup intr */
 #if 1
-                       /* XXX: table? */
-                       switch (prep_model) {
-                       case IBM_6050:
-                       case IBM_7248:
-                               switch (device) {
-                               case 12:
-                               case 18:
-                               case 22:
-                                       line = 15;
-                                       break;
-                               default:
-                                       line = 0;
-                                       break;
-                               }
+                       /* XXX: ibm_machdep : ppc830 depend */
+                       switch (device) {
+                       case 12:
+                       case 18:
+                       case 22:
+                               line = 15;
                                break;
-
                        default:
                                line = 0;
                                break;
diff -r b541c1c154c6 -r ccd7b971fa82 sys/arch/prep/prep/cpu.c
--- a/sys/arch/prep/prep/cpu.c  Tue Jun 19 11:36:17 2001 +0000
+++ b/sys/arch/prep/prep/cpu.c  Tue Jun 19 11:56:27 2001 +0000
@@ -1,30 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.2 2001/06/17 15:57:13 nonaka Exp $   */
-
-/*-
- * Copyright (C) 2000, 2001 NONAKA Kimihiro.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
+/*     $NetBSD: cpu.c,v 1.3 2001/06/19 11:56:27 nonaka Exp $   */
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -33,10 +7,9 @@
 #include <machine/autoconf.h>
 #include <machine/bus.h>
 #include <machine/cpu.h>
-#include <machine/preptype.h>
 
-int cpumatch(struct device *, struct cfdata *, void *);
-void cpuattach(struct device *, struct device *, void *);
+int cpumatch __P((struct device *, struct cfdata *, void *));
+void cpuattach __P((struct device *, struct device *, void *));
 
 struct cfattach cpu_ca = {
        sizeof(struct device), cpumatch, cpuattach
@@ -67,11 +40,8 @@
 
        printf("\n");
 
-       switch (prep_model) {
-       case IBM_6050:
-       case IBM_7248:
-       case IBM_6040:
-           {
+       {
+               /* XXX: ibm_machdep */
                u_char l2ctrl, cpuinf;
 
                /* system control register */
@@ -96,10 +66,5 @@
                        printf("not present");
 
                printf("\n");
-           }
-               break;
-
-       default:
-               break;
        }
 }
diff -r b541c1c154c6 -r ccd7b971fa82 sys/arch/prep/prep/extintr.c
--- a/sys/arch/prep/prep/extintr.c      Tue Jun 19 11:36:17 2001 +0000
+++ b/sys/arch/prep/prep/extintr.c      Tue Jun 19 11:56:27 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: extintr.c,v 1.7 2001/06/17 15:57:14 nonaka Exp $       */
+/*     $NetBSD: extintr.c,v 1.8 2001/06/19 11:56:28 nonaka Exp $       */
 /*     $OpenBSD: isabus.c,v 1.12 1999/06/15 02:40:05 rahnds Exp $      */
 
 /*-
@@ -95,14 +95,13 @@
 #include <uvm/uvm_extern.h>
 
 #include <machine/intr.h>
-#include <machine/preptype.h>
 #include <machine/psl.h>
 
 #include <dev/isa/isavar.h>
 
-void intr_calculatemasks(void);
-int fakeintr(void *);
-void ext_intr(void);
+void intr_calculatemasks __P((void));
+int fakeintr __P((void *));
+void ext_intr __P((void));
 
 extern paddr_t prep_intr_reg;
 extern int cold;
@@ -141,14 +140,7 @@
        /* what about enabling external interrupt in here? */
        pcpl = splhigh();       /* Turn off all */
 
-       switch (prep_model) {
-       case IBM_6050:
-               irq = *(u_char *)(prep_intr_reg + INTR_VECTOR_REG);
-               break;
-       default:
-               irq = isa_intr();
-               break;
-       }
+       irq = isa_intr();
        intrcnt2[irq]++;
 
        r_imen = 1 << irq;
diff -r b541c1c154c6 -r ccd7b971fa82 sys/arch/prep/prep/machdep.c
--- a/sys/arch/prep/prep/machdep.c      Tue Jun 19 11:36:17 2001 +0000
+++ b/sys/arch/prep/prep/machdep.c      Tue Jun 19 11:56:27 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.20 2001/06/17 15:57:14 nonaka Exp $      */
+/*     $NetBSD: machdep.c,v 1.21 2001/06/19 11:56:28 nonaka Exp $      */
 
 /*
  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -64,7 +64,6 @@
 #include <machine/intr.h>
 #include <machine/pmap.h>
 #include <machine/powerpc.h>
-#include <machine/preptype.h>
 #include <machine/residual.h>
 #include <machine/trap.h>
 
@@ -138,7 +137,6 @@
 struct bat battable[16];
 
 paddr_t prep_intr_reg;                 /* PReP interrupt vector register */
-int prep_model;
 
 #define        OFMEMREGIONS    32
 struct mem_region physmemr[OFMEMREGIONS], availmemr[OFMEMREGIONS];
@@ -230,20 +228,6 @@
                ns_per_tick = 1000000000 / ticks_per_sec;
        }
 
-       /*
-        * Set PReP type.
-        */
-       {
-               struct btinfo_model *modelinfo;
-
-               modelinfo =
-                   (struct btinfo_model *)lookup_bootinfo(BTINFO_MODEL);
-               if (modelinfo == NULL)
-                       prep_model = PREP_UNKNOWN;
-               else
-                       prep_model = modelinfo->model;
-       }
-
        proc0.p_addr = proc0paddr;
        bzero(proc0.p_addr, sizeof *proc0.p_addr);
 
@@ -791,29 +775,21 @@
 
        printf("rebooting...\n\n");
 
-       switch (prep_model) {
-       case IBM_6050:
-       case IBM_7248:
-       case IBM_6040:
-               {
-                       int msr;
-                       u_char reg;
-
-                       asm volatile("mfmsr %0" : "=r"(msr));
-                       msr |= PSL_IP;
-                       asm volatile("mtmsr %0" :: "r"(msr));
+       {
+               /* XXX: ibm_machdep */
+               int msr;
+               u_char reg;
 
-                       reg = *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92);
-                       reg &= ~1UL;
-                       *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg;
-                       reg = *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92);
-                       reg |= 1;
-                       *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg;
-               }
-               break;
+               asm volatile("mfmsr %0" : "=r"(msr));
+               msr |= PSL_IP;
+               asm volatile("mtmsr %0" :: "r"(msr));
 
-       default:
-               break;
+               reg = *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92);
+               reg &= ~1UL;
+               *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg;
+               reg = *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92);
+               reg |= 1;
+               *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg;



Home | Main Index | Thread Index | Old Index