[src/trunk]: src/sys/arch/hpcarm/sa11x0 Overhaul interrupt handlers.

[toshii <toshii%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/34adbd26eb6d
branches:  trunk
changeset: 508682:34adbd26eb6d
user:      toshii <toshii%NetBSD.org@localhost>
date:      Tue Apr 17 15:58:51 2001 +0000

description:
Overhaul interrupt handlers.
- Set the match register before calling hardclock() to prevent
 clockintr lossage.
- Better handling of match register overrun case.

diffstat:

 sys/arch/hpcarm/sa11x0/sa11x0_ost.c |  67 ++++++++++++++++++++++++------------
 1 files changed, 44 insertions(+), 23 deletions(-)

diffs (125 lines):

diff -r fdad372621d7 -r 34adbd26eb6d sys/arch/hpcarm/sa11x0/sa11x0_ost.c
--- a/sys/arch/hpcarm/sa11x0/sa11x0_ost.c       Tue Apr 17 15:53:04 2001 +0000
+++ b/sys/arch/hpcarm/sa11x0/sa11x0_ost.c       Tue Apr 17 15:58:51 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sa11x0_ost.c,v 1.5 2001/04/17 15:49:02 toshii Exp $    */
+/*     $NetBSD: sa11x0_ost.c,v 1.6 2001/04/17 15:58:51 toshii Exp $    */
 
 /*
  * Copyright (c) 1997 Mark Brinicombe.
@@ -124,32 +124,42 @@
 {
        struct clockframe *frame = arg;
        u_int32_t oscr, nextmatch, oldmatch;
+       int s;
 
        bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
                        SAOST_SR, 1);
 
-       hardclock(frame);
-
        /* schedule next clock intr */
        oldmatch = saost_sc->sc_clock_count;
        nextmatch = oldmatch + TIMER_FREQUENCY / hz;
+
+       bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR0,
+                         nextmatch);
        oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
                                SAOST_CR);
-       /* XXX it will take some time to return from intr */
-       oscr += 100;
+
        if ((nextmatch > oldmatch &&
             (oscr > nextmatch || oscr < oldmatch)) ||
            (nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) {
-               /* we were late to handle this intr */
-               /* XXX adjust clock to compensate lost hardclock() calls */
+               /*
+                * we couldn't set the matching register in time.
+                * just set it to some value so that next interrupt happens.
+                * XXX is it possible to compansate lost interrupts?
+                */
 
-               /* XXX is this ok? */
-               nextmatch = oscr + TIMER_FREQUENCY / hz;
+               s = splhigh();
+               oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
+                                       SAOST_CR);
+               nextmatch = oscr + 10;
+               bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
+                                 SAOST_MR0, nextmatch);
+               splx(s);
        }
+
        saost_sc->sc_clock_count = nextmatch;
-       bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR0,
-                         nextmatch);
-       return(-1);
+       hardclock(frame);
+
+       return(1);
 }
 
 static int
@@ -158,32 +168,42 @@
 {
        struct clockframe *frame = arg;
        u_int32_t oscr, nextmatch, oldmatch;
+       int s;
 
        bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
                        SAOST_SR, 2);
 
-       statclock(frame);
-
        /* schedule next clock intr */
        oldmatch = saost_sc->sc_statclock_count;
        nextmatch = oldmatch + saost_sc->sc_statclock_step;
+
+       bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR1,
+                         nextmatch);
        oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
                                SAOST_CR);
-       /* XXX it will take some time to return from intr */
-       oscr += 100;
+
        if ((nextmatch > oldmatch &&
             (oscr > nextmatch || oscr < oldmatch)) ||
            (nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) {
                /*
-                * XXX silently drop timed out statclock() calls,
-                * XXX but we should compensate them.
+                * we couldn't set the matching register in time.
+                * just set it to some value so that next interrupt happens.
+                * XXX is it possible to compansate lost interrupts?
                 */
-               nextmatch = oscr + saost_sc->sc_statclock_step;
+
+               s = splhigh();
+               oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
+                                       SAOST_CR);
+               nextmatch = oscr + 10;
+               bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
+                                 SAOST_MR1, nextmatch);
+               splx(s);
        }
-       saost_sc->sc_clock_count = nextmatch;
-       bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR1,
-                         nextmatch);
-       return(-1);
+
+       saost_sc->sc_statclock_count = nextmatch;
+       statclock(frame);
+
+       return(1);
 }
 
 
@@ -216,6 +236,7 @@
        /* Use the channels 0 and 1 for hardclock and statclock, respectively */
        saost_sc->sc_clock_count = TIMER_FREQUENCY / hz;
        saost_sc->sc_statclock_count = TIMER_FREQUENCY / stathz;
+
        bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_IR, 3);
        bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR0,
                          saost_sc->sc_clock_count);