Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/sparc64 Fix interrupt delivery on UltraSPARC IIi ma...
details: https://anonhg.NetBSD.org/src/rev/afc976c64855
branches: trunk
changeset: 494080:afc976c64855
user: eeh <eeh%NetBSD.org@localhost>
date: Fri Jun 30 22:58:01 2000 +0000
description:
Fix interrupt delivery on UltraSPARC IIi machines.
diffstat:
sys/arch/sparc64/include/cpu.h | 8 +-
sys/arch/sparc64/sparc64/genassym.c | 3 +-
sys/arch/sparc64/sparc64/genassym.cf | 3 +-
sys/arch/sparc64/sparc64/intr.c | 21 +-
sys/arch/sparc64/sparc64/locore.s | 407 ++++++++++++++++++++++++++++------
sys/arch/sparc64/sparc64/machdep.c | 4 +-
6 files changed, 353 insertions(+), 93 deletions(-)
diffs (truncated from 798 to 300 lines):
diff -r 99246d1679df -r afc976c64855 sys/arch/sparc64/include/cpu.h
--- a/sys/arch/sparc64/include/cpu.h Fri Jun 30 22:17:53 2000 +0000
+++ b/sys/arch/sparc64/include/cpu.h Fri Jun 30 22:58:01 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.20 2000/06/19 23:30:34 eeh Exp $ */
+/* $NetBSD: cpu.h,v 1.21 2000/06/30 22:58:01 eeh Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -219,9 +219,13 @@
short ih_number; /* interrupt number */
/* the H/W provides */
short ih_pil; /* interrupt priority */
- struct intrhand *ih_next;
+ struct intrhand *ih_next; /* global list */
volatile u_int64_t *ih_map; /* Interrupt map reg */
volatile u_int64_t *ih_clr; /* clear interrupt reg */
+ struct intrhand *ih_pending; /* Used by interrupt
+ * dispatch code
+ * -- DON'T TOUCH
+ */
};
extern struct intrhand *intrhand[15];
extern struct intrhand *intrlev[MAXINTNUM];
diff -r 99246d1679df -r afc976c64855 sys/arch/sparc64/sparc64/genassym.c
--- a/sys/arch/sparc64/sparc64/genassym.c Fri Jun 30 22:17:53 2000 +0000
+++ b/sys/arch/sparc64/sparc64/genassym.c Fri Jun 30 22:58:01 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: genassym.c,v 1.14 2000/06/24 20:48:40 eeh Exp $ */
+/* $NetBSD: genassym.c,v 1.15 2000/06/30 22:58:01 eeh Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -229,6 +229,7 @@
off("IH_NEXT", struct intrhand, ih_next);
off("IH_MAP", struct intrhand, ih_map);
off("IH_CLR", struct intrhand, ih_clr);
+ off("IH_PEND", struct intrhand, ih_pending);
siz("IH_SIZE", struct intrhand);
off("NO_NEXTNODE", struct nodeops, no_nextnode);
diff -r 99246d1679df -r afc976c64855 sys/arch/sparc64/sparc64/genassym.cf
--- a/sys/arch/sparc64/sparc64/genassym.cf Fri Jun 30 22:17:53 2000 +0000
+++ b/sys/arch/sparc64/sparc64/genassym.cf Fri Jun 30 22:58:01 2000 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.16 2000/06/24 20:48:40 eeh Exp $
+# $NetBSD: genassym.cf,v 1.17 2000/06/30 22:58:01 eeh Exp $
#
# Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -232,6 +232,7 @@
define IH_NEXT offsetof(struct intrhand, ih_next)
define IH_MAP offsetof(struct intrhand, ih_map)
define IH_CLR offsetof(struct intrhand, ih_clr)
+define IH_PEND offsetof(struct intrhand, ih_pending)
# floppy trap handler fields
define FDC_REG_MSR offsetof(struct fdcio, fdcio_reg_msr)
diff -r 99246d1679df -r afc976c64855 sys/arch/sparc64/sparc64/intr.c
--- a/sys/arch/sparc64/sparc64/intr.c Fri Jun 30 22:17:53 2000 +0000
+++ b/sys/arch/sparc64/sparc64/intr.c Fri Jun 30 22:58:01 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.c,v 1.26 2000/06/29 07:37:57 mrg Exp $ */
+/* $NetBSD: intr.c,v 1.27 2000/06/30 22:58:02 eeh Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -109,13 +109,13 @@
int softintr __P((void *));
int softnet __P((void *));
int send_softclock __P((void *));
-int intr_list_handler __P((void *));
+int intr_list_handler __P((void *, void *));
/*
* Stray interrupt handler. Clear it if possible.
* If not, and if we get 10 interrupts in 10 seconds, panic.
*/
-int ignore_stray = 1;
+int ignore_stray = 0;
int straycnt[16];
void
@@ -149,6 +149,9 @@
straytime = time.tv_sec;
nstray = 1;
}
+#ifdef DDB
+ Debugger();
+#endif
}
#include "arp.h"
@@ -246,8 +249,9 @@
* a handler to hand out interrupts.
*/
int
-intr_list_handler(arg)
+intr_list_handler(arg, vec)
void * arg;
+ void * vec;
{
int claimed = 0;
struct intrhand *ih = (struct intrhand *)arg;
@@ -258,9 +262,9 @@
#ifdef DEBUG
{
extern int intrdebug;
- if (intrdebug)
- printf("intr %p %x arg %p %s\n",
- ih, ih->ih_number, ih->ih_arg,
+ if (intrdebug & 1)
+ printf("intr %p %x arg %p vec %p %s\n",
+ ih, ih->ih_number, ih->ih_arg, vec,
claimed ? "claimed" : "");
}
#endif
@@ -289,6 +293,7 @@
*/
ih->ih_pil = level; /* XXXX caller should have done this before */
ih->ih_next = NULL;
+ ih->ih_pending = NULL;
for (p = &intrhand[level]; (q = *p) != NULL; p = &q->ih_next)
;
*p = ih;
@@ -350,6 +355,8 @@
ih->ih_fun = fun;
ih->ih_arg = arg;
ih->ih_pil = level;
+ ih->ih_clr = NULL;
+ ih->ih_pending = NULL;
return (void *)ih;
}
diff -r 99246d1679df -r afc976c64855 sys/arch/sparc64/sparc64/locore.s
--- a/sys/arch/sparc64/sparc64/locore.s Fri Jun 30 22:17:53 2000 +0000
+++ b/sys/arch/sparc64/sparc64/locore.s Fri Jun 30 22:58:01 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.65 2000/06/24 20:48:41 eeh Exp $ */
+/* $NetBSD: locore.s,v 1.66 2000/06/30 22:58:02 eeh Exp $ */
/*
* Copyright (c) 1996-1999 Eduardo Horvath
* Copyright (c) 1996 Paul Kranenburg
@@ -53,8 +53,10 @@
*
* @(#)locore.s 8.4 (Berkeley) 12/10/93
*/
-
-#undef NO_VCACHE /* Map w/D$ disabled */
+#define DIAGNOSTIC
+
+#undef PHYS_CLEAR
+#define NO_VCACHE /* Map w/D$ disabled */
#define TRAPTRACE /* Keep history of all traps (unsafe) */
#undef FLTRACE /* Keep history of all page faults */
#define TRAPSTATS /* Count traps */
@@ -62,6 +64,7 @@
#define HWREF /* Track ref/mod bits in trap handlers */
#undef MMUDEBUG /* Check use of regs during MMU faults */
#define VECTORED_INTERRUPTS /* Use interrupt vectors */
+#define NEW_VEC /* New interrupt vector code */
#define PMAP_FPSTATE /* Allow nesting of VIS pmap copy/zero */
#define NEW_FPSTATE
#define PMAP_PHYS_PAGE /* Use phys ASIs for pmap copy/zero */
@@ -249,16 +252,15 @@
#define TO_STACK64(size) \
andcc %sp, 1, %g0; /* 64-bit stack? */ \
save %sp, size, %sp; \
- beq,a 9f; \
- add %sp, -BIAS, %sp; /* Convert to 64-bits */ \
-9:
+ add %sp, -BIAS, %o0; /* Convert to 64-bits */ \
+ movz %icc, %o0, %sp
#define TO_STACK32(size) \
andcc %sp, 1, %g0; /* 64-bit stack? */ \
save %sp, size, %sp; \
- bne,a 9f; \
- add %sp, +BIAS, %sp; /* Convert to 32-bits */ \
-9:
+ add %sp, +BIAS, %o0; /* Convert to 32-bits */ \
+ movnz %icc, %o0, %sp
+
.data
.globl _C_LABEL(data_start)
@@ -2327,7 +2329,9 @@
!!
set EINTSTACK+1024-STKB, %sp ! Set the stack pointer to the middle of the idle stack
wrpr %g0, 15, %pil ! Disable interrupts, too
- ta 1
+ wrpr %g0, %g0, %canrestore ! Our stack is hozed and our PCB
+ wrpr %g0, 7, %cansave ! probably is too, so blow away
+ ta 1 ! all our register windows.
#endif
winfixfill:
@@ -3899,6 +3903,9 @@
set _C_LABEL(intrlev), %g3
bz,pn %icc, 3f ! spurious interrupt
cmp %g2, MAXINTNUM
+
+ stxa %g0, [%g0] ASI_IRSR ! Ack IRQ
+ membar #Sync ! Should not be needed due to retry
#ifdef DEBUG
tgeu 55
#endif
@@ -3919,6 +3926,88 @@
DLFLUSH(%g6, %g7)
lduh [%g5+IH_PIL], %g6 ! Read interrupt mask
DLFLUSH2(%g7)
+#ifdef VECTORED_INTERRUPTS
+#ifdef NEW_VEC
+ set intrpending, %g1
+ sll %g6, PTRSHFT, %g3 ! Find the slot for this IPL
+ add %g1, %g3, %g1
+
+ DLFLUSH(%g1, %g3)
+1:
+ LDPTR [%g1], %g4 ! Load list
+ STPTR %g4, [%g5 + IH_PEND] ! Append list to new intrhand
+ mov %g5, %g3
+ CASPTR [%g1] ASI_N, %g4, %g3 ! Swap in new list
+ cmp %g4, %g3
+ bne,pn %xcc, 1b
+ nop
+
+#else /* NEW_VEC */
+ set intrpending, %g1
+ mov 8, %g7 ! Number of slots to search
+ sll %g6, PTRSHFT+3, %g3 ! Find start of table for this IPL
+ add %g1, %g3, %g1
+2:
+#if 1
+ DLFLUSH(%g1, %g3)
+ mov %g5, %g3
+ CASPTR [%g1] ASI_N, %g0, %g3 ! Try a slot -- MPU safe
+ brz,pt %g3, 5f ! Available?
+#else
+ DLFLUSH(%g1, %g3)
+ LDPTR [%g1], %g3 ! Try a slot
+ brz,a %g3, 5f ! Available?
+ STPTR %g5, [%g1] ! Grab it
+#endif
+#ifdef DEBUG
+ cmp %g5, %g3 ! if these are the same
+ bne,pt %icc, 1f ! then we aleady have the
+ nop ! interrupt registered
+ set _C_LABEL(intrdebug), %g4
+ ld [%g4], %g4
+ btst INTRDEBUG_VECTOR, %g4
+ bz,pt %icc, 1f
+ nop
+#ifdef _LP64
+ TO_STACK64(-CC64FSZ) ! Get a clean register window
+#else
+ TO_STACK32(-CC64FSZ) ! Get a clean register window
+#endif
+ set 9f, %o0
+ GLOBTOLOC
+ clr %g4
+ call prom_printf
+ mov %g3, %o1
+ LOCTOGLOB
+ ba 1f
+ restore
+1:
+#endif
+ dec %g7
+ brgz,pt %g7, 2b
+ inc PTRSZ, %g1 ! Next slot
+
+ !! If we get here we have a problem.
+ !! There were no available slots and the interrupt was lost.
+ !! We'll resort to polling in this case.
+#ifdef DIAGNOSTIC
+#ifdef _LP64
+ TO_STACK64(-CC64FSZ) ! Get a clean register window
+#else
+ TO_STACK32(-CC64FSZ) ! Get a clean register window
+#endif
+ set 8f, %o0
+ mov %g6, %o1
+ GLOBTOLOC
+ clr %g4
+ call prom_printf
+ rdpr %pil, %o2
+ LOCTOGLOB
+ ba 5f
+ restore
+#endif
+#endif /* NEW_VEC */
+5:
#ifdef DEBUG
set _C_LABEL(intrdebug), %g7
ld [%g7], %g7
@@ -3933,6 +4022,7 @@
set 4f, %o0
mov %g2, %o1
rdpr %pil, %o3
Home |
Main Index |
Thread Index |
Old Index