[src/netbsd-1-6]: src/sys/arch/arm/arm Pull up revision 1.15 (requested by th...

[he <he%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/5cba5d2e51a3
branches:  netbsd-1-6
changeset: 529398:5cba5d2e51a3
user:      he <he%NetBSD.org@localhost>
date:      Mon Nov 18 02:12:37 2002 +0000

description:
Pull up revision 1.15 (requested by thorpej in ticket #681):
  Fix a fencepost error in the cache flush routines, caused
  by using the wrong condition on a branch.

diffstat:

 sys/arch/arm/arm/cpufunc_asm_xscale.S |  53 +++-------------------------------
 1 files changed, 6 insertions(+), 47 deletions(-)

diffs (103 lines):

diff -r f4e7e7748069 -r 5cba5d2e51a3 sys/arch/arm/arm/cpufunc_asm_xscale.S
--- a/sys/arch/arm/arm/cpufunc_asm_xscale.S     Mon Nov 18 02:02:12 2002 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_xscale.S     Mon Nov 18 02:12:37 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_xscale.S,v 1.13.4.1 2002/11/16 10:01:44 he Exp $   */
+/*     $NetBSD: cpufunc_asm_xscale.S,v 1.13.4.2 2002/11/18 02:12:37 he Exp $   */
 
 /*
  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -369,7 +369,7 @@
 1:     mcr     p15, 0, r0, c7, c10, 1  /* clean D cache entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        CPWAIT(r0)
 
@@ -390,7 +390,7 @@
        mcr     p15, 0, r0, c7, c5, 1   /* flush I cache single entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        CPWAIT(r0)
 
@@ -410,7 +410,7 @@
        mcr     p15, 0, r0, c7, c6, 1   /* flush D cache single entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        CPWAIT(r0)
 
@@ -430,7 +430,7 @@
        mcr     p15, 0, r0, c7, c5, 1   /* flush I cache single entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        CPWAIT(r0)
 
@@ -438,30 +438,7 @@
 
        CPWAIT_AND_RETURN(r0)
 
-/* Used in write-through mode. */
-ENTRY(xscale_cache_flushID_rng)
-       cmp     r1, #0x4000
-       bcs     _C_LABEL(xscale_cache_flushID)
-
-       and     r2, r0, #0x1f
-       add     r1, r1, r2
-       bic     r0, r0, #0x1f
-
-1:     mcr     p15, 0, r0, c7, c6, 1   /* flush D cache single entry */
-       mcr     p15, 0, r0, c7, c5, 1   /* flush I cache single entry */
-       add     r0, r0, #32
-       subs    r1, r1, #32
-       bpl     1b
-
-       mcr     p15, 0, r0, c7, c10, 4  /* drain write buffer */
-
-       CPWAIT_AND_RETURN(r0)
-
-/* Used in write-though mode. */
 ENTRY(xscale_cache_flushD_rng)
-       cmp     r1, #0x4000
-       bcs     _C_LABEL(xscale_cache_flushD)
-
        and     r2, r0, #0x1f
        add     r1, r1, r2
        bic     r0, r0, #0x1f
@@ -469,25 +446,7 @@
 1:     mcr     p15, 0, r0, c7, c6, 1   /* flush D cache single entry */
        add     r0, r0, #32
        subs    r1, r1, #32
-       bpl     1b
-
-       mcr     p15, 0, r0, c7, c10, 4  /* drain write buffer */
-
-       CPWAIT_AND_RETURN(r0)
-
-/* Used in write-through mode. */
-ENTRY(xscale_cache_flushI_rng)
-       cmp     r1, #0x4000
-       bcs     _C_LABEL(xscale_cache_flushI)
-
-       and     r2, r0, #0x1f
-       add     r1, r1, r2
-       bic     r0, r0, #0x1f
-
-1:     mcr     p15, 0, r0, c7, c5, 1   /* flush I cache single entry */
-       add     r0, r0, #32
-       subs    r1, r1, #32
-       bpl     1b
+       bhi     1b
 
        mcr     p15, 0, r0, c7, c10, 4  /* drain write buffer */