[src/trunk]: src/share/man/man4 More clearly document the amazing lossage of ...

[fair <fair%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8f0468083f66
branches:  trunk
changeset: 582360:8f0468083f66
user:      fair <fair%NetBSD.org@localhost>
date:      Sun Jun 26 01:50:52 2005 +0000

description:
More clearly document the amazing lossage of this chip/core in an
expanded BUGS section. Sprinkle more mdoc macros in appropriate
places.

diffstat:

 share/man/man4/geodeide.4 |  47 +++++++++++++++++++++++++++++++++++++++++------
 1 files changed, 41 insertions(+), 6 deletions(-)

diffs (79 lines):

diff -r 77e94154ace3 -r 8f0468083f66 share/man/man4/geodeide.4
--- a/share/man/man4/geodeide.4 Sat Jun 25 23:25:51 2005 +0000
+++ b/share/man/man4/geodeide.4 Sun Jun 26 01:50:52 2005 +0000
@@ -1,4 +1,4 @@
-.\"    $NetBSD: geodeide.4,v 1.2 2004/07/30 23:12:16 rumble Exp $
+.\"    $NetBSD: geodeide.4,v 1.3 2005/06/26 01:50:52 fair Exp $
 .\"
 .\" Copyright (c) 2004 Manuel Bouyer.
 .\"
@@ -27,7 +27,7 @@
 .\" INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd July 30, 2004
+.Dd June 25, 2005
 .Dt GEODEIDE 4
 .Os
 .Sh NAME
@@ -38,17 +38,26 @@
 .Sh DESCRIPTION
 The
 .Nm
-driver supports the AMD Geode CS5530A and SC1100 IDE controllers,
+driver supports the
+.Tn AMD
+Geode CS5530A and SC1100
+.Tn IDE
+controllers,
 and provides the interface with the hardware for the
 .Xr ata 4
 driver.
 .Pp
 The 0x0002 flag forces the
 .Nm
-driver to disable DMA on chipsets for which DMA would normally be
-enabled.
+driver to disable
+.Tn DMA
+on chipsets for which
+.Tn DMA
+would normally be enabled.
 This can be used as a debugging aid, or to work around
-problems where the IDE controller is wired up to the system incorrectly.
+problems where the
+.Tn IDE
+controller is wired up to the system incorrectly.
 .Sh SEE ALSO
 .Xr ata 4 ,
 .Xr atapi 4 ,
@@ -60,3 +69,29 @@
 .Sh BUGS
 The SC1100 controller requires 4-byte aligned data transfers and
 cannot handle transfers of exactly 64 kilobytes.
+.Pp
+The CS5530 multifunction chip/core's
+.Tn IDE
+section claims to be capable of
+.Tn UDMA
+mode 2
+.Pq 33.3MB/s
+but in practice using that mode swamps the controller so badly that
+.Nm
+limits the
+.Tn UDMA
+negotiation to mode 1
+.Pq 25MB/s
+so that the other functions of this chip continue to work.
+.Pp
+The
+.Tn IDE DMA
+engine in the CS5530 can only do transfers on cache-line
+.Pq 16-byte
+boundaries.
+Attempts to perform
+.Tn DMA
+on any other alignment will crash the system.
+This problem may also exist in the SC1100 since the CS5530 was its
+direct predecessor, and it is not clear that National Semiconductor
+fixed any bugs in it.