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[src/netbsd-2-0]: src/sys/dev/pci Pull up revision 1.1 (requested by toshii i...
details: https://anonhg.NetBSD.org/src/rev/4e34de730244
branches: netbsd-2-0
changeset: 561494:4e34de730244
user: tron <tron%NetBSD.org@localhost>
date: Mon Jun 21 16:41:45 2004 +0000
description:
Pull up revision 1.1 (requested by toshii in ticket #517):
Add re(4) RealTek 8139C+/8169/8169S/8110S PCI ethernet adapter driver,
from FreeBSD.
I haven't tested this code very well, but it seems to work fairly well
for me.
diffstat:
sys/dev/pci/if_re.c | 2145 +++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 2145 insertions(+), 0 deletions(-)
diffs (truncated from 2149 to 300 lines):
diff -r 5a96024d3b11 -r 4e34de730244 sys/dev/pci/if_re.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/pci/if_re.c Mon Jun 21 16:41:45 2004 +0000
@@ -0,0 +1,2145 @@
+/*
+ * Copyright (c) 1997, 1998-2003
+ * Bill Paul <wpaul%windriver.com@localhost>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Bill Paul.
+ * 4. Neither the name of the author nor the names of any co-contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+/* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
+
+/*
+ * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
+ *
+ * Written by Bill Paul <wpaul%windriver.com@localhost>
+ * Senior Networking Software Engineer
+ * Wind River Systems
+ */
+
+/*
+ * This driver is designed to support RealTek's next generation of
+ * 10/100 and 10/100/1000 PCI ethernet controllers. There are currently
+ * four devices in this family: the RTL8139C+, the RTL8169, the RTL8169S
+ * and the RTL8110S.
+ *
+ * The 8139C+ is a 10/100 ethernet chip. It is backwards compatible
+ * with the older 8139 family, however it also supports a special
+ * C+ mode of operation that provides several new performance enhancing
+ * features. These include:
+ *
+ * o Descriptor based DMA mechanism. Each descriptor represents
+ * a single packet fragment. Data buffers may be aligned on
+ * any byte boundary.
+ *
+ * o 64-bit DMA
+ *
+ * o TCP/IP checksum offload for both RX and TX
+ *
+ * o High and normal priority transmit DMA rings
+ *
+ * o VLAN tag insertion and extraction
+ *
+ * o TCP large send (segmentation offload)
+ *
+ * Like the 8139, the 8139C+ also has a built-in 10/100 PHY. The C+
+ * programming API is fairly straightforward. The RX filtering, EEPROM
+ * access and PHY access is the same as it is on the older 8139 series
+ * chips.
+ *
+ * The 8169 is a 64-bit 10/100/1000 gigabit ethernet MAC. It has almost the
+ * same programming API and feature set as the 8139C+ with the following
+ * differences and additions:
+ *
+ * o 1000Mbps mode
+ *
+ * o Jumbo frames
+ *
+ * o GMII and TBI ports/registers for interfacing with copper
+ * or fiber PHYs
+ *
+ * o RX and TX DMA rings can have up to 1024 descriptors
+ * (the 8139C+ allows a maximum of 64)
+ *
+ * o Slight differences in register layout from the 8139C+
+ *
+ * The TX start and timer interrupt registers are at different locations
+ * on the 8169 than they are on the 8139C+. Also, the status word in the
+ * RX descriptor has a slightly different bit layout. The 8169 does not
+ * have a built-in PHY. Most reference boards use a Marvell 88E1000 'Alaska'
+ * copper gigE PHY.
+ *
+ * The 8169S/8110S 10/100/1000 devices have built-in copper gigE PHYs
+ * (the 'S' stands for 'single-chip'). These devices have the same
+ * programming API as the older 8169, but also have some vendor-specific
+ * registers for the on-board PHY. The 8110S is a LAN-on-motherboard
+ * part designed to be pin-compatible with the RealTek 8100 10/100 chip.
+ *
+ * This driver takes advantage of the RX and TX checksum offload and
+ * VLAN tag insertion/extraction features. It also implements TX
+ * interrupt moderation using the timer interrupt registers, which
+ * significantly reduces TX interrupt load. There is also support
+ * for jumbo frames, however the 8169/8169S/8110S can not transmit
+ * jumbo frames larger than 7.5K, so the max MTU possible with this
+ * driver is 7500 bytes.
+ */
+
+#include "bpfilter.h"
+#include "vlan.h"
+
+#include <sys/param.h>
+#include <sys/endian.h>
+#include <sys/systm.h>
+#include <sys/sockio.h>
+#include <sys/mbuf.h>
+#include <sys/malloc.h>
+#include <sys/kernel.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/if_dl.h>
+#include <net/if_ether.h>
+#include <net/if_media.h>
+#include <net/if_vlanvar.h>
+
+#if NBPFILTER > 0
+#include <net/bpf.h>
+#endif
+
+#include <machine/bus.h>
+
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+/*
+ * Default to using PIO access for this driver.
+ */
+#define RE_USEIOSPACE
+
+#include <dev/ic/rtl81x9reg.h>
+#include <dev/ic/rtl81x9var.h>
+
+struct re_pci_softc {
+ struct rtk_softc sc_rtk;
+
+ void *sc_ih;
+ pci_chipset_tag_t sc_pc;
+ pcitag_t sc_pcitag;
+};
+
+/*
+ * Various supported device vendors/types and their names.
+ */
+static struct rtk_type re_devs[] = {
+ { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, RTK_HWREV_8139CPLUS,
+ "RealTek 8139C+ 10/100BaseTX" },
+ { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8169,
+ "RealTek 8169 Gigabit Ethernet" },
+ { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8169S,
+ "RealTek 8169S Single-chip Gigabit Ethernet" },
+ { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8110S,
+ "RealTek 8110S Single-chip Gigabit Ethernet" },
+ { 0, 0, 0, NULL }
+};
+
+static struct rtk_hwrev re_hwrevs[] = {
+ { RTK_HWREV_8139, RTK_8139, "" },
+ { RTK_HWREV_8139A, RTK_8139, "A" },
+ { RTK_HWREV_8139AG, RTK_8139, "A-G" },
+ { RTK_HWREV_8139B, RTK_8139, "B" },
+ { RTK_HWREV_8130, RTK_8139, "8130" },
+ { RTK_HWREV_8139C, RTK_8139, "C" },
+ { RTK_HWREV_8139D, RTK_8139, "8139D/8100B/8100C" },
+ { RTK_HWREV_8139CPLUS, RTK_8139CPLUS, "C+"},
+ { RTK_HWREV_8169, RTK_8169, "8169"},
+ { RTK_HWREV_8169S, RTK_8169, "8169S"},
+ { RTK_HWREV_8110S, RTK_8169, "8110S"},
+ { RTK_HWREV_8100, RTK_8139, "8100"},
+ { RTK_HWREV_8101, RTK_8139, "8101"},
+ { 0, 0, NULL }
+};
+
+int re_probe(struct device *, struct cfdata *, void *);
+void re_attach(struct device *, struct device *, void *);
+#if 0
+int re_detach(struct device *, int);
+#endif
+
+static int re_encap (struct rtk_softc *, struct mbuf *, int *);
+
+static int re_allocmem (struct rtk_softc *);
+static int re_newbuf (struct rtk_softc *, int, struct mbuf *);
+static int re_rx_list_init (struct rtk_softc *);
+static int re_tx_list_init (struct rtk_softc *);
+static void re_rxeof (struct rtk_softc *);
+static void re_txeof (struct rtk_softc *);
+static int re_intr (void *);
+static void re_tick (void *);
+static void re_start (struct ifnet *);
+static int re_ioctl (struct ifnet *, u_long, caddr_t);
+static int re_init (struct ifnet *);
+static void re_stop (struct rtk_softc *);
+static void re_watchdog (struct ifnet *);
+#if 0
+static int re_suspend (device_t);
+static int re_resume (device_t);
+static void re_shutdown (device_t);
+#endif
+static int re_ifmedia_upd (struct ifnet *);
+static void re_ifmedia_sts (struct ifnet *, struct ifmediareq *);
+
+static int re_gmii_readreg (struct device *, int, int);
+static void re_gmii_writereg (struct device *, int, int, int);
+
+static int re_miibus_readreg (struct device *, int, int);
+static void re_miibus_writereg (struct device *, int, int, int);
+static void re_miibus_statchg (struct device *);
+
+static void re_reset (struct rtk_softc *);
+
+static int re_diag (struct rtk_softc *);
+
+#ifdef RE_USEIOSPACE
+#define RTK_RES SYS_RES_IOPORT
+#define RTK_RID RTK_PCI_LOIO
+#else
+#define RTK_RES SYS_RES_MEMORY
+#define RTK_RID RTK_PCI_LOMEM
+#endif
+
+CFATTACH_DECL(re, sizeof(struct re_pci_softc), re_probe, re_attach, NULL,
+ NULL);
+
+#define EE_SET(x) \
+ CSR_WRITE_1(sc, RTK_EECMD, \
+ CSR_READ_1(sc, RTK_EECMD) | x)
+
+#define EE_CLR(x) \
+ CSR_WRITE_1(sc, RTK_EECMD, \
+ CSR_READ_1(sc, RTK_EECMD) & ~x)
+
+
+static int
+re_gmii_readreg(struct device *self, int phy, int reg)
+{
+ struct rtk_softc *sc = (void *)self;
+ u_int32_t rval;
+ int i;
+
+ if (phy != 7)
+ return(0);
+
+ /* Let the rgephy driver read the GMEDIASTAT register */
+
+ if (reg == RTK_GMEDIASTAT) {
+ rval = CSR_READ_1(sc, RTK_GMEDIASTAT);
+ return(rval);
+ }
+
+ CSR_WRITE_4(sc, RTK_PHYAR, reg << 16);
+ DELAY(1000);
+
+ for (i = 0; i < RTK_TIMEOUT; i++) {
+ rval = CSR_READ_4(sc, RTK_PHYAR);
+ if (rval & RTK_PHYAR_BUSY)
+ break;
+ DELAY(100);
+ }
+
+ if (i == RTK_TIMEOUT) {
+ printf ("%s: PHY read failed\n", sc->sc_dev.dv_xname);
+ return (0);
+ }
+
+ return (rval & RTK_PHYAR_PHYDATA);
+}
+
+static void
+re_gmii_writereg(struct device *dev, int phy, int reg, int data)
+{
+ struct rtk_softc *sc = (void *)dev;
+ u_int32_t rval;
+ int i;
+
+ CSR_WRITE_4(sc, RTK_PHYAR, (reg << 16) |
+ (data & RTK_PHYAR_PHYDATA) | RTK_PHYAR_BUSY);
+ DELAY(1000);
+
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