[src/netbsd-1-6]: src/sys/dev/pci Pull up revision 1.59 (requested by thorpej...

[tron <tron%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/6868b63c372d
branches:  netbsd-1-6
changeset: 529234:6868b63c372d
user:      tron <tron%NetBSD.org@localhost>
date:      Fri Nov 01 18:28:14 2002 +0000

description:
Pull up revision 1.59 (requested by thorpej in ticket #414):
Load configuration data from the EEPROM on the DP83820 differently: rather
than grovel the EEPROM directly, initiate an "EEPROM load" in the PCI
test register, and fetch the values from the CFG register.

diffstat:

 sys/dev/pci/if_sip.c |  67 +++++++++++++++++++++++++++++++--------------------
 1 files changed, 41 insertions(+), 26 deletions(-)

diffs (113 lines):

diff -r a493d25426d3 -r 6868b63c372d sys/dev/pci/if_sip.c
--- a/sys/dev/pci/if_sip.c      Fri Nov 01 18:25:40 2002 +0000
+++ b/sys/dev/pci/if_sip.c      Fri Nov 01 18:28:14 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_sip.c,v 1.52.4.4 2002/11/01 18:25:40 tron Exp $     */
+/*     $NetBSD: if_sip.c,v 1.52.4.5 2002/11/01 18:28:14 tron Exp $     */
 
 /*-
  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
@@ -82,7 +82,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_sip.c,v 1.52.4.4 2002/11/01 18:25:40 tron Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_sip.c,v 1.52.4.5 2002/11/01 18:28:14 tron Exp $");
 
 #include "bpfilter.h"
 
@@ -791,36 +791,63 @@
         */
 #ifdef DP83820
        /*
-        * XXX Need some PCI flags indicating support for
-        * XXX 64-bit addressing.
+        * Cause the chip to load configuration data from the EEPROM.
         */
-       sc->sc_cfg &= ~(CFG_M64ADDR | CFG_T64ADDR);
+       bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_PTSCR, PTSCR_EELOAD_EN);
+       for (i = 0; i < 10000; i++) {
+               delay(10);
+               if ((bus_space_read_4(sc->sc_st, sc->sc_sh, SIP_PTSCR) &
+                   PTSCR_EELOAD_EN) == 0)
+                       break;
+       }
+       if (bus_space_read_4(sc->sc_st, sc->sc_sh, SIP_PTSCR) &
+           PTSCR_EELOAD_EN) {
+               printf("%s: timeout loading configuration from EEPROM\n",
+                   sc->sc_dev.dv_xname);
+               return;
+       }
 
        reg = bus_space_read_4(sc->sc_st, sc->sc_sh, SIP_CFG);
        if (reg & CFG_PCI64_DET) {
                printf("%s: 64-bit PCI slot detected\n", sc->sc_dev.dv_xname);
-               if ((sc->sc_cfg & CFG_DATA64_EN) == 0)
+               if (reg & CFG_DATA64_EN)
+                       sc->sc_cfg |= CFG_DATA64_EN;
+               else
                        printf("%s: 64-bit data transfers disabled in EEPROM\n",
                            sc->sc_dev.dv_xname);
-       } else
-               sc->sc_cfg &= ~CFG_DATA64_EN;
-
-       if (sc->sc_cfg & (CFG_TBI_EN|CFG_EXT_125)) {
+       }
+
+       /*
+        * XXX Need some PCI flags indicating support for
+        * XXX 64-bit addressing.
+        */
+#if 0
+       if (reg & CFG_M64ADDR)
+               sc->sc_cfg |= CFG_M64ADDR;
+       if (reg & CFG_T64ADDR)
+               sc->sc_cfg |= CFG_T64ADDR;
+#endif
+
+       if (reg & (CFG_TBI_EN|CFG_EXT_125)) {
                const char *sep = "";
                printf("%s: using ", sc->sc_dev.dv_xname);
-               if (sc->sc_cfg & CFG_EXT_125) {
+               if (reg & CFG_EXT_125) {
+                       sc->sc_cfg |= CFG_EXT_125;
                        printf("%s125MHz clock", sep);
                        sep = ", ";
                }
-               if (sc->sc_cfg & CFG_TBI_EN) {
+               if (reg & CFG_TBI_EN) {
+                       sc->sc_cfg |= CFG_TBI_EN;
                        printf("%sten-bit interface", sep);
                        sep = ", ";
                }
                printf("\n");
        }
-       if ((pa->pa_flags & PCI_FLAGS_MRM_OKAY) == 0)
+       if ((pa->pa_flags & PCI_FLAGS_MRM_OKAY) == 0 ||
+           (reg & CFG_MRM_DIS) != 0)
                sc->sc_cfg |= CFG_MRM_DIS;
-       if ((pa->pa_flags & PCI_FLAGS_MWI_OKAY) == 0)
+       if ((pa->pa_flags & PCI_FLAGS_MWI_OKAY) == 0 ||
+           (reg & CFG_MWI_DIS) != 0)
                sc->sc_cfg |= CFG_MWI_DIS;
 
        /*
@@ -3080,18 +3107,6 @@
 
        /* Get the GPIOR bits. */
        sc->sc_gpior = eeprom_data[0x04];
-
-       /* Get various CFG related bits. */
-       if (eeprom_data[0x05] & DP83820_CONFIG2_CFG_EXT_125)
-               sc->sc_cfg |= CFG_EXT_125;
-       if (eeprom_data[0x05] & DP83820_CONFIG2_CFG_M64ADDR)
-               sc->sc_cfg |= CFG_M64ADDR;
-       if (eeprom_data[0x05] & DP83820_CONFIG2_CFG_DATA64_EN)
-               sc->sc_cfg |= CFG_DATA64_EN;
-       if (eeprom_data[0x05] & DP83820_CONFIG2_CFG_T64ADDR)
-               sc->sc_cfg |= CFG_T64ADDR;
-       if (eeprom_data[0x05] & DP83820_CONFIG2_CFG_TBI_EN)
-               sc->sc_cfg |= CFG_TBI_EN;
 }
 #else /* ! DP83820 */
 void