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[src/trunk]: src/sys/dev/ata Serial ATA register definitions.
details: https://anonhg.NetBSD.org/src/rev/0e8d9917c95d
branches: trunk
changeset: 556384:0e8d9917c95d
user: thorpej <thorpej%NetBSD.org@localhost>
date: Sun Dec 14 17:14:47 2003 +0000
description:
Serial ATA register definitions.
diffstat:
sys/dev/ata/Makefile | 4 +-
sys/dev/ata/satareg.h | 147 ++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 149 insertions(+), 2 deletions(-)
diffs (165 lines):
diff -r b15499a17449 -r 0e8d9917c95d sys/dev/ata/Makefile
--- a/sys/dev/ata/Makefile Sun Dec 14 15:31:23 2003 +0000
+++ b/sys/dev/ata/Makefile Sun Dec 14 17:14:47 2003 +0000
@@ -1,8 +1,8 @@
-# $NetBSD: Makefile,v 1.4 2002/08/05 23:29:30 soren Exp $
+# $NetBSD: Makefile,v 1.5 2003/12/14 17:14:47 thorpej Exp $
INCSDIR= /usr/include/dev/ata
# Only install includes which are used by userland
-INCS= atareg.h atavar.h
+INCS= atareg.h atavar.h satareg.h
.include <bsd.kinc.mk>
diff -r b15499a17449 -r 0e8d9917c95d sys/dev/ata/satareg.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/ata/satareg.h Sun Dec 14 17:14:47 2003 +0000
@@ -0,0 +1,147 @@
+/* $NetBSD: satareg.h,v 1.1 2003/12/14 17:14:47 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 2003 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _DEV_ATA_SATAREG_H_
+#define _DEV_ATA_SATAREG_H_
+
+/*
+ * Serial ATA register definitions.
+ *
+ * Reference:
+ *
+ * Serial ATA: High Speed Serialized AT Attachment
+ * Revsion 1.0 29-August-2001
+ * Serial ATA Working Group
+ */
+
+/*
+ * SStatus (SCR0) --
+ * Serial ATA interface status register
+ */
+ /*
+ * The DET value indicates the interface device detection and
+ * PHY state.
+ */
+#define SStatus_DET_NODEV (0x0 << 0) /* no device connected */
+#define SStatus_DET_DEV_NE (0x1 << 0) /* device, but PHY comm not
+ established */
+#define SStatus_DET_DEV (0x3 << 0) /* device, PHY comm
+ established */
+#define SStatus_DET_OFFLINE (0x4 << 0) /* PHY in offline mode */
+#define SStatus_DET_mask (0xf << 0)
+#define SStatus_DET_shift 0
+ /*
+ * The SPD value indicates the negotiated interface communication
+ * speed established.
+ */
+#define SStatus_SPD_NONE (0x0 << 4) /* no negotiated speed */
+#define SStatus_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */
+#define SStatus_SPD_mask (0xf << 4)
+#define SStatus_SPD_shift 4
+ /*
+ * The IPM value indicates the current interface power managemnt
+ * state.
+ */
+#define SStatus_IPM_NODEV (0x0 << 8) /* no device connected */
+#define SStatus_IPM_ACTIVE (0x1 << 8) /* ACTIVE state */
+#define SStatus_IPM_PARTIAL (0x2 << 8) /* PARTIAL pm state */
+#define SStatus_IPM_SLUMBER (0x6 << 8) /* SLUMBER pm state */
+#define SStatus_IPM_mask (0xf << 8)
+#define SStatus_IPM_shift 8
+
+/*
+ * SError (SCR1) --
+ * Serial ATA interface error register
+ */
+#define SError_ERR_I (1U << 0) /* Recovered data integrity
+ error */
+#define SError_ERR_M (1U << 1) /* Recovered communications
+ error */
+#define SError_ERR_T (1U << 8) /* Non-recovered transient
+ data integrity error */
+#define SError_ERR_C (1U << 9) /* Non-recovered persistent
+ communication or data
+ integrity error */
+#define SError_ERR_P (1U << 10) /* Protocol error */
+#define SError_ERR_E (1U << 11) /* Internal error */
+#define SError_DIAG_N (1U << 16) /* PhyRdy change */
+#define SError_DIAG_I (1U << 17) /* PHY internal error */
+#define SError_DIAG_W (1U << 18) /* Comm Wake */
+#define SError_DIAG_B (1U << 19) /* 10b to 8b decode error */
+#define SError_DIAG_D (1U << 20) /* Disparity error */
+#define SError_DIAG_C (1U << 21) /* CRC error */
+#define SError_DIAG_H (1U << 22) /* Handshake error */
+#define SError_DIAG_S (1U << 23) /* Link sequence error */
+#define SError_DIAG_T (1U << 24) /* Transport state transition
+ error */
+#define SError_DIAG_F (1U << 25) /* Unrecognized FIS type */
+
+/*
+ * SControl (SCR2) --
+ * Serial ATA interface control register
+ */
+ /*
+ * The DET field controls the host adapter device detection
+ * and interface initialization.
+ */
+#define SControl_DET_NONE (0x0 << 0) /* No device detection or
+ initialization action
+ requested */
+#define SControl_DET_INIT (0x1 << 0) /* Initialize interface
+ communication (equiv
+ of a hard reset) */
+#define SControl_DET_DISABLE (0x4 << 0) /* disable interface and
+ take PHY offline */
+ /*
+ * The SPD field represents the highest allowed communication
+ * speed the interface is allowed to negotiate when communication
+ * is established.
+ */
+#define SControl_SPD_ANY (0x0 << 4) /* No restrictions */
+#define SControl_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */
+ /*
+ * The IPM field represents the enabled interface power management
+ * states that can be invoked via the Serial ATA interface power
+ * management capabilities.
+ */
+#define SControl_IPM_ANY (0x0 << 8) /* No restrictions */
+#define SControl_IPM_NOPARTIAL (0x1 << 8) /* PARTIAL disabled */
+#define SControl_IPM_NOSLUMBER (0x2 << 8) /* SLUMBER disabled */
+#define SControl_IPM_NONE (0x3 << 8) /* No power management */
+
+#endif /* _DEV_ATA_SATAREG_H_ */
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