Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/dev/ic Define config register 3 values for NCR53C9x/FAS216.
details: https://anonhg.NetBSD.org/src/rev/2b3c7d00eb7c
branches: trunk
changeset: 476617:2b3c7d00eb7c
user: mhitch <mhitch%NetBSD.org@localhost>
date: Wed Sep 22 03:31:23 1999 +0000
description:
Define config register 3 values for NCR53C9x/FAS216.
Add sc_cfg3_fscsi to the softc and use it to set the chip into Fast SCSI
mode for the chips that use it.
diffstat:
sys/dev/ic/ncr53c9x.c | 12 +++++++++---
sys/dev/ic/ncr53c9xreg.h | 13 ++++++++++++-
sys/dev/ic/ncr53c9xvar.h | 3 ++-
3 files changed, 23 insertions(+), 5 deletions(-)
diffs (70 lines):
diff -r 1055627c47c6 -r 2b3c7d00eb7c sys/dev/ic/ncr53c9x.c
--- a/sys/dev/ic/ncr53c9x.c Wed Sep 22 03:01:53 1999 +0000
+++ b/sys/dev/ic/ncr53c9x.c Wed Sep 22 03:31:23 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ncr53c9x.c,v 1.34 1999/02/12 00:52:52 thorpej Exp $ */
+/* $NetBSD: ncr53c9x.c,v 1.35 1999/09/22 03:31:23 mhitch Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -444,8 +444,14 @@
* put the chip in Fast SCSI mode.
*/
if (ti->period <= 50)
- cfg3 |= (sc->sc_rev == NCR_VARIANT_AM53C974) ?
- NCRAMDCFG3_FSCSI : NCRCFG3_FSCSI;
+ /*
+ * There are (at least) 4 variations of the
+ * configuration 3 register. The drive attach
+ * routine sets the appropriate bit to put the
+ * chip into Fast SCSI mode so that it doesn't
+ * have to be figured out here each time.
+ */
+ cfg3 |= sc->sc_cfg3_fscsi;
}
/*
diff -r 1055627c47c6 -r 2b3c7d00eb7c sys/dev/ic/ncr53c9xreg.h
--- a/sys/dev/ic/ncr53c9xreg.h Wed Sep 22 03:01:53 1999 +0000
+++ b/sys/dev/ic/ncr53c9xreg.h Wed Sep 22 03:31:23 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ncr53c9xreg.h,v 1.5 1999/01/06 19:19:38 thorpej Exp $ */
+/* $NetBSD: ncr53c9xreg.h,v 1.6 1999/09/22 03:31:23 mhitch Exp $ */
/*
* Copyright (c) 1994 Peter Galbavy. All rights reserved.
@@ -166,6 +166,17 @@
#define NCRESPCFG3_ADMA 0x02 /* Alternate DMA Mode */
#define NCRESPCFG3_T8M 0x01 /* Threshold 8 Mode */
+/* Config #3 also different on NCR53CF9x/FAS216 */
+#define NCR_F9XCFG3 0x0c /* RW - Configuration #3 */
+#define NCRF9XCFG3_IDM 0x80 /* ID Message Res Check */
+#define NCRF9XCFG3_QTE 0x40 /* Queue Tag Enable */
+#define NCRF9XCFG3_CDB 0x20 /* CDB 10-bytes OK */
+#define NCRF9XCFG3_FSCSI 0x10 /* Fast SCSI */
+#define NCRF9XCFG3_FCLK 0x08 /* Fast Clock (>25Mhz) */
+#define NCRF9XCFG3_SRESB 0x04 /* Save Residual Byte */
+#define NCRF9XCFG3_ADMA 0x02 /* Alternate DMA Mode */
+#define NCRF9XCFG3_T8M 0x01 /* Threshold 8 Mode */
+
/* Config #4 only on ESP406/FAS408 */
#define NCR_CFG4 0x0d /* RW - Configuration #4 */
#define NCRCFG4_CRS1 0x80 /* Select register set #1 */
diff -r 1055627c47c6 -r 2b3c7d00eb7c sys/dev/ic/ncr53c9xvar.h
--- a/sys/dev/ic/ncr53c9xvar.h Wed Sep 22 03:01:53 1999 +0000
+++ b/sys/dev/ic/ncr53c9xvar.h Wed Sep 22 03:31:23 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ncr53c9xvar.h,v 1.17 1999/01/06 19:19:38 thorpej Exp $ */
+/* $NetBSD: ncr53c9xvar.h,v 1.18 1999/09/22 03:31:23 mhitch Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -243,6 +243,7 @@
u_char sc_cfg1; /* Config 1 */
u_char sc_cfg2; /* Config 2, not ESP100 */
u_char sc_cfg3; /* Config 3, only ESP200 */
+ u_char sc_cfg3_fscsi; /* Chip-specific FSCSI bit */
u_char sc_ccf; /* Clock Conversion */
u_char sc_timeout;
Home |
Main Index |
Thread Index |
Old Index