[src/trunk]: src/sys/arch/arm32/arm32 Fix to solve PR arm32/9208 "RiscPC rebo...

[reinoud <reinoud%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/afdd9bdfbdc5
branches:  trunk
changeset: 503934:afdd9bdfbdc5
user:      reinoud <reinoud%NetBSD.org@localhost>
date:      Sun Feb 18 12:21:02 2001 +0000

description:
Fix to solve PR arm32/9208 "RiscPC reboot hangs"
Due to the StrongARM support code in the cpu_reset() MC-function,
an instruction was executed to drain the write back buffer on StrongARM
processors (might even be armv4+).

Since ARM{6,7} don't recognize this instruction they will either except
for an illegal instruction on this or have undefined behaviour resulting
in an endless illegal instruction/data abort/reset behaviour.

The fix contains a flag that signals if the WB flush should be executed
or not for the detected processor.

diffstat:

 sys/arch/arm32/arm32/cpufunc.c |  13 ++++++++++++-
 sys/arch/arm32/arm32/locore.S  |  23 ++++++++++++++++++++---
 2 files changed, 32 insertions(+), 4 deletions(-)

diffs (103 lines):

diff -r 0f7ef06051ac -r afdd9bdfbdc5 sys/arch/arm32/arm32/cpufunc.c
--- a/sys/arch/arm32/arm32/cpufunc.c    Sun Feb 18 10:50:45 2001 +0000
+++ b/sys/arch/arm32/arm32/cpufunc.c    Sun Feb 18 12:21:02 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.10 2001/01/12 13:43:12 bjh21 Exp $       */
+/*     $NetBSD: cpufunc.c,v 1.11 2001/02/18 12:21:02 reinoud Exp $     */
 
 /*
  * arm8 support code Copyright (c) 1997 ARM Limited
@@ -332,8 +332,15 @@
 };          
 #endif /* CPU_SA110 */
 
+
+/*
+ * Global constants also used by locore.s
+ */
+
 struct cpu_functions cpufuncs;
 u_int cputype;
+u_int cpu_reset_needs_wb_drain;                /* flag used in locore.s */
+
 
 /*
  * Cannot panic here as we may not have a console yet ...
@@ -349,22 +356,26 @@
 #ifdef CPU_ARM6
        case ID_ARM610:
                cpufuncs = arm6_cpufuncs;
+               cpu_reset_needs_wb_drain = 0;
                break;
 #endif /* CPU_ARM6 */
 #ifdef CPU_ARM7
        case ID_ARM700:
        case ID_ARM710:
                cpufuncs = arm7_cpufuncs;
+               cpu_reset_needs_wb_drain = 0;
                break;
 #endif /* CPU_ARM7 */
 #ifdef CPU_ARM8
        case ID_ARM810:
                cpufuncs = arm8_cpufuncs;
+               cpu_reset_needs_wb_drain = 0;   /* XXX correct? */
                break;
 #endif /* CPU_ARM8 */
 #ifdef CPU_SA110
        case ID_SA110:
                cpufuncs = sa110_cpufuncs;
+               cpu_reset_needs_wb_drain = 1;   /* SA needs it  */
                break;
 #endif /* CPU_SA110 */
        default:
diff -r 0f7ef06051ac -r afdd9bdfbdc5 sys/arch/arm32/arm32/locore.S
--- a/sys/arch/arm32/arm32/locore.S     Sun Feb 18 10:50:45 2001 +0000
+++ b/sys/arch/arm32/arm32/locore.S     Sun Feb 18 12:21:02 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.35 2001/01/13 00:06:51 bjh21 Exp $        */
+/*     $NetBSD: locore.S,v 1.36 2001/02/18 12:21:02 reinoud Exp $      */
 
 /*
  * Copyright (C) 1994-1997 Mark Brinicombe
@@ -188,12 +188,20 @@
 Lboot_cache_purged:
 
        /*
+        * load the needs_wb_drain flag to determine if its nessisary
+        */
+
+       ldr     r1, Lcpu_reset_needs_wb_drain
+       ldr     r1, [r1]
+       cmp     r1, #0
+
+       /*
         * MMU & IDC off, 32 bit program & data space
         * Hurl ourselves into the ROM
         */
        mov     r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
        mcr     15, 0, r0, c1, c0, 0
-       mcr     15, 0, r0, c8, c7, 0
+       mcrne   15, 0, r0, c8, c7, 0    /* only when wb drain is asked for */
        mov     pc, r4
 
        /*
@@ -201,9 +209,18 @@
         * the cpu reset after turning the MMU off
         * This variable is provided by the hardware specific code
         */
-
 Lcpu_reset_address:
        .word   _C_LABEL(cpu_reset_address)
+
+       /*
+        * cpu_reset_needs_wb_drain contains a flag that signals if the wb
+        * drain instruction needs executing... it is an illegal instruction
+        * on f.e. ARM6/7 that locks up the computer in an endless illegal
+        * instruction / data-abort / reset loop.
+        */
+Lcpu_reset_needs_wb_drain:
+       .word   _C_LABEL(cpu_reset_needs_wb_drain)
+
 #endif /* OFW */
 
 #ifdef IPKDB