[src/trunk]: src/sys/arch/sgimips/sgimips Memory and I/O space accesses to MA...

[rafal <rafal%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/327c96471553
branches:  trunk
changeset: 538048:327c96471553
user:      rafal <rafal%NetBSD.org@localhost>
date:      Thu Oct 10 18:16:40 2002 +0000

description:
Memory and I/O space accesses to MACE PCI address ranges are passed through
in the correct byte order, so there's no reason to byteswap them.

diffstat:

 sys/arch/sgimips/sgimips/bus.c |  9 +++------
 1 files changed, 3 insertions(+), 6 deletions(-)

diffs (33 lines):

diff -r 87e2ab36075d -r 327c96471553 sys/arch/sgimips/sgimips/bus.c
--- a/sys/arch/sgimips/sgimips/bus.c    Thu Oct 10 17:41:19 2002 +0000
+++ b/sys/arch/sgimips/sgimips/bus.c    Thu Oct 10 18:16:40 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bus.c,v 1.14 2002/06/02 14:44:43 drochner Exp $        */
+/*     $NetBSD: bus.c,v 1.15 2002/10/10 18:16:40 rafal Exp $   */
 
 /*
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -141,9 +141,8 @@
        case 1: /* XXX HPC */
                return *(volatile u_int16_t *)(h + (o << 2) + 1);
        case 2: /* mem */
+       case 4: /* I/O */
                return *(volatile u_int16_t *)(h + (o | 2) - (o & 3));
-       case 4: /* I/O */
-               return bswap16(*(volatile u_int16_t *)(h + (o | 2) - (o & 3)));
        default:
                panic("no bus tag");
        }
@@ -164,11 +163,9 @@
                *(volatile u_int16_t *)(h + (o << 2) + 1) = v;
                break;
        case 2: /* mem */
+       case 4: /* I/O */
                *(volatile u_int16_t *)(h + (o | 2) - (o & 3)) = v;
                break;
-       case 4: /* I/O */
-               *(volatile u_int16_t *)(h + (o | 2) - (o & 3)) = bswap16(v);
-               break;
        default:
                panic("no bus tag");
        }