[src/trunk]: src/lib/libc/arch/arm32/gen In the division core: if the highest...

[is <is%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/0bdb33e49768
branches:  trunk
changeset: 476418:0bdb33e49768
user:      is <is%NetBSD.org@localhost>
date:      Thu Sep 16 09:15:05 1999 +0000

description:
In the division core: if the highest bit of the dividend is set,
we have to be careful when shifting the divisor. Test this.

This fixes PR 7760 by Richard Earnshaw.

diffstat:

 lib/libc/arch/arm32/gen/divsi3.S |  85 +++++++++++++++++++++++++++++++++++++++-
 1 files changed, 84 insertions(+), 1 deletions(-)

diffs (109 lines):

diff -r fbfcb7b818ad -r 0bdb33e49768 lib/libc/arch/arm32/gen/divsi3.S
--- a/lib/libc/arch/arm32/gen/divsi3.S  Thu Sep 16 09:12:06 1999 +0000
+++ b/lib/libc/arch/arm32/gen/divsi3.S  Thu Sep 16 09:15:05 1999 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: divsi3.S,v 1.2 1997/10/17 18:43:48 mark Exp $  */
+/*     $NetBSD: divsi3.S,v 1.3 1999/09/16 09:15:05 is Exp $    */
 
 /*
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@@ -77,6 +77,87 @@
        mov     r2, #1
        mov     r3, #0
 
+       /*
+        * If the highest bit of the dividend is set, we have to be
+        * careful when shifting the divisor. Test this. 
+        */
+       movs    r1,r1
+       bpl     L_old_code
+
+       /*
+        * At this point, the highest bit of r1 is known to be set.
+        * We abuse this below in the tst instructions.
+        */
+       tst     r1, r0 /*, lsl #0 */
+       bmi     L_divide_b1
+       tst     r1, r0, lsl #1
+       bmi     L_divide_b2
+       tst     r1, r0, lsl #2
+       bmi     L_divide_b3
+       tst     r1, r0, lsl #3
+       bmi     L_divide_b4
+       tst     r1, r0, lsl #4
+       bmi     L_divide_b5
+       tst     r1, r0, lsl #5
+       bmi     L_divide_b6
+       tst     r1, r0, lsl #6
+       bmi     L_divide_b7
+       tst     r1, r0, lsl #7
+       bmi     L_divide_b8
+       tst     r1, r0, lsl #8
+       bmi     L_divide_b9
+       tst     r1, r0, lsl #9
+       bmi     L_divide_b10
+       tst     r1, r0, lsl #10
+       bmi     L_divide_b11
+       tst     r1, r0, lsl #11
+       bmi     L_divide_b12
+       tst     r1, r0, lsl #12
+       bmi     L_divide_b13
+       tst     r1, r0, lsl #13
+       bmi     L_divide_b14
+       tst     r1, r0, lsl #14
+       bmi     L_divide_b15
+       tst     r1, r0, lsl #15
+       bmi     L_divide_b16
+       tst     r1, r0, lsl #16
+       bmi     L_divide_b17
+       tst     r1, r0, lsl #17
+       bmi     L_divide_b18
+       tst     r1, r0, lsl #18
+       bmi     L_divide_b19
+       tst     r1, r0, lsl #19
+       bmi     L_divide_b20
+       tst     r1, r0, lsl #20
+       bmi     L_divide_b21
+       tst     r1, r0, lsl #21
+       bmi     L_divide_b22
+       tst     r1, r0, lsl #22
+       bmi     L_divide_b23
+       tst     r1, r0, lsl #23
+       bmi     L_divide_b24
+       tst     r1, r0, lsl #24
+       bmi     L_divide_b25
+       tst     r1, r0, lsl #25
+       bmi     L_divide_b26
+       tst     r1, r0, lsl #26
+       bmi     L_divide_b27
+       tst     r1, r0, lsl #27
+       bmi     L_divide_b28
+       tst     r1, r0, lsl #28
+       bmi     L_divide_b29
+       tst     r1, r0, lsl #29
+       bmi     L_divide_b30
+       tst     r1, r0, lsl #30
+       bmi     L_divide_b31
+/*
+ * instead of:
+ *     tst     r1, r0, lsl #31
+ *     bmi     L_divide_b32
+ */
+       b       L_divide_b32
+
+L_old_code:
        cmp     r1, r0
        bcc     L_divide_b0
        cmp     r1, r0, lsl #1
@@ -139,9 +220,11 @@
        bcc     L_divide_b29
        cmp     r1, r0, lsl #30
        bcc     L_divide_b30
+L_divide_b32:
        cmp     r1, r0, lsl #31
        subhs   r1, r1,r0, lsl #31
        addhs   r3, r3,r2, lsl #31
+L_divide_b31:
        cmp     r1, r0, lsl #30
        subhs   r1, r1,r0, lsl #30
        addhs   r3, r3,r2, lsl #30