Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch Clean up some bad interaction between the spl inlin...
details: https://anonhg.NetBSD.org/src/rev/5812e27a982e
branches: trunk
changeset: 537963:5812e27a982e
user: thorpej <thorpej%NetBSD.org@localhost>
date: Wed Oct 09 00:03:42 2002 +0000
description:
Clean up some bad interaction between the spl inlining stuff and
strict-prototypes.
diffstat:
sys/arch/arm/xscale/i80321_icu.c | 89 ++++++---------------------------
sys/arch/arm/xscale/i80321_intr.h | 21 ++++---
sys/arch/evbarm/iq80310/iq80310_intr.c | 62 +++--------------------
sys/arch/evbarm/iq80310/iq80310_intr.h | 14 +++--
4 files changed, 43 insertions(+), 143 deletions(-)
diffs (truncated from 377 to 300 lines):
diff -r 378016fa8228 -r 5812e27a982e sys/arch/arm/xscale/i80321_icu.c
--- a/sys/arch/arm/xscale/i80321_icu.c Tue Oct 08 23:59:41 2002 +0000
+++ b/sys/arch/arm/xscale/i80321_icu.c Wed Oct 09 00:03:42 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_icu.c,v 1.5 2002/08/17 16:42:20 briggs Exp $ */
+/* $NetBSD: i80321_icu.c,v 1.6 2002/10/09 00:03:42 thorpej Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -35,6 +35,10 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#ifndef EVBARM_SPL_NOINLINE
+#define EVBARM_SPL_NOINLINE
+#endif
+
/*
* Interrupt support for the Intel i80321 I/O Processor.
*/
@@ -83,10 +87,6 @@
ICU_INT_bit4, /* SI_SOFTSERIAL */
};
-#define INT_SWMASK \
- ((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) | \
- (1U << ICU_INT_bit5) | (1U << ICU_INT_bit4))
-
#define SI_TO_IRQBIT(si) (1U << si_to_irqbit[(si)])
/*
@@ -155,18 +155,6 @@
return (iintsrc & intr_enabled);
}
-#if defined(EVBARM_SPL_NOINLINE)
-static __inline void
-i80321_set_intrmask(void)
-{
- extern __volatile uint32_t intr_enabled;
-
- __asm __volatile("mcr p6, 0, %0, c0, c0, 0"
- :
- : "r" (intr_enabled & ICU_INT_HWMASK));
-}
-#endif
-
static __inline void
i80321_set_intrsteer(void)
{
@@ -321,9 +309,9 @@
oldirqstate = disable_interrupts(I32_bit);
#define DO_SOFTINT(si) \
- if ((i80321_ipending & ~new) & SI_TO_IRQBIT(si)) { \
- i80321_ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level |= i80321_imask[si_to_ipl[(si)]]; \
+ if ((i80321_ipending & ~new) & SI_TO_IRQBIT(si)) { \
+ i80321_ipending &= ~SI_TO_IRQBIT(si); \
+ current_spl_level |= i80321_imask[si_to_ipl[(si)]]; \
restore_interrupts(oldirqstate); \
softintr_dispatch(si); \
oldirqstate = disable_interrupts(I32_bit); \
@@ -340,72 +328,27 @@
restore_interrupts(oldirqstate);
}
-#if defined(EVBARM_SPL_NOINLINE)
-
-__inline void
+void
splx(int new)
{
- int oldirqstate, hwpend;
- current_spl_level = new;
+ i80321_splx(new);
+}
- hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new;
- if (hwpend != 0) {
- oldirqstate = disable_interrupts(I32_bit);
- intr_enabled |= hwpend;
- i80321_set_intrmask();
- restore_interrupts(oldirqstate);
- }
+int
+_spllower(int ipl)
+{
- if ((i80321_ipending & INT_SWMASK) & ~new)
- i80321_do_pending();
+ return (i80321_spllower(ipl));
}
int
_splraise(int ipl)
{
- int old;
- old = current_spl_level;
- current_spl_level |= i80321_imask[ipl];
-
- return (old);
-}
-
-int
-_spllower(int ipl)
-{
- int old = current_spl_level;
-
- splx(i80321_imask[ipl]);
- return(old);
+ return (i80321_splraise(ipl));
}
-#else /* EVBARM_SPL_NOINLINE */
-
-#undef splx
-__inline void
-splx(int new)
-{
- i80321_splx(new);
-}
-
-#undef _spllower
-int
-_spllower(int ipl)
-{
- return i80321_spllower(ipl);
-}
-
-#undef _splraise
-int
-_splraise(int ipl)
-{
- return i80321_splraise(ipl);
-}
-
-#endif /* else EVBARM_SPL_NOINLINE */
-
void
_setsoftintr(int si)
{
diff -r 378016fa8228 -r 5812e27a982e sys/arch/arm/xscale/i80321_intr.h
--- a/sys/arch/arm/xscale/i80321_intr.h Tue Oct 08 23:59:41 2002 +0000
+++ b/sys/arch/arm/xscale/i80321_intr.h Wed Oct 09 00:03:42 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_intr.h,v 1.1 2002/08/17 16:42:20 briggs Exp $ */
+/* $NetBSD: i80321_intr.h,v 1.2 2002/10/09 00:03:42 thorpej Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -43,8 +43,9 @@
#include <arm/xscale/i80321reg.h>
-#if !defined(EVBARM_SPL_NOINLINE)
-static __inline void
+void i80321_do_pending(void);
+
+static __inline void __attribute__((__unused__))
i80321_set_intrmask(void)
{
extern __volatile uint32_t intr_enabled;
@@ -58,7 +59,7 @@
((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) | \
(1U << ICU_INT_bit5) | (1U << ICU_INT_bit4))
-static __inline void
+static __inline void __attribute__((__unused__))
i80321_splx(int new)
{
extern __volatile uint32_t intr_enabled;
@@ -81,7 +82,7 @@
i80321_do_pending();
}
-static __inline int
+static __inline int __attribute__((__unused__))
i80321_splraise(int ipl)
{
extern __volatile int current_spl_level;
@@ -94,7 +95,7 @@
return (old);
}
-static __inline int
+static __inline int __attribute__((__unused__))
i80321_spllower(int ipl)
{
extern __volatile int current_spl_level;
@@ -105,20 +106,20 @@
return(old);
}
+#if !defined(EVBARM_SPL_NOINLINE)
+
#define splx(new) i80321_splx(new)
#define _spllower(ipl) i80321_spllower(ipl)
#define _splraise(ipl) i80321_splraise(ipl)
void _setsoftintr(int);
-#undef INT_SWMASK
-
-#else /* !EVBARM_SPL_NOINTR */
+#else
int _splraise(int);
int _spllower(int);
void splx(int);
void _setsoftintr(int);
-#endif /* else !EVBARM_SPL_NOINTR */
+#endif /* ! EVBARM_SPL_NOINLINE */
#endif _I80321_INTR_H_
diff -r 378016fa8228 -r 5812e27a982e sys/arch/evbarm/iq80310/iq80310_intr.c
--- a/sys/arch/evbarm/iq80310/iq80310_intr.c Tue Oct 08 23:59:41 2002 +0000
+++ b/sys/arch/evbarm/iq80310/iq80310_intr.c Wed Oct 09 00:03:42 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: iq80310_intr.c,v 1.17 2002/08/17 16:42:23 briggs Exp $ */
+/* $NetBSD: iq80310_intr.c,v 1.18 2002/10/09 00:03:42 thorpej Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -35,6 +35,10 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#ifndef EVBARM_SPL_NOINLINE
+#define EVBARM_SPL_NOINLINE
+#endif
+
/*
* Interrupt support for the Intel IQ80310.
*/
@@ -282,77 +286,27 @@
restore_interrupts(oldirqstate);
}
-#if defined(EVBARM_SPL_NOINLINE)
int
_splraise(int ipl)
{
- int old;
- old = current_spl_level;
- current_spl_level |= iq80310_imask[ipl];
-
- return (old);
+ return (iq80310_splraise(ipl));
}
__inline void
splx(int new)
{
- int old;
- old = current_spl_level;
- current_spl_level = new;
-
- /* If there are software interrupts to process, do it. */
- if ((iq80310_ipending & ~IRQ_BITS) & ~new)
- iq80310_do_soft();
-
- /*
- * If there are pending hardware interrupts (i.e. the
- * external interrupt is disabled in the ICU), and all
- * hardware interrupts are being unblocked, then re-enable
- * the external hardware interrupt.
- *
- * XXX We have to wait for ALL hardware interrupts to
- * XXX be unblocked, because we currently lose if we
- * XXX get nested interrupts, and I don't know why yet.
- */
- if ((new & IRQ_BITS) == 0 && (iq80310_ipending & IRQ_BITS))
- i80200_intr_enable(INTCTL_IM | INTCTL_PM);
+ return (iq80310_splx(new));
}
int
_spllower(int ipl)
{
- int old = current_spl_level;
- iq80310_splx(iq80310_imask[ipl]);
- return (old);
-}
-
-#else
-
-#undef _splraise
-int
-_splraise(int ipl)
-{
- return iq80310_splraise(ipl);
+ return (iq80310_spllower(ipl));
}
Home |
Main Index |
Thread Index |
Old Index