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[src/trunk]: src/sys/dev/ieee1394 Extensive changes from fwnode integration
details: https://anonhg.NetBSD.org/src/rev/418f646db8bd
branches: trunk
changeset: 509294:418f646db8bd
user: jmc <jmc%NetBSD.org@localhost>
date: Tue May 01 04:48:10 2001 +0000
description:
Extensive changes from fwnode integration
Move interrupt routine to simply updating state flags and ack'ing interrupts
Move main processing into kthread
Change IPL level to IPL_BIO and try not to hold splbio very much if at all.
Add baseline support for attaching/detaching/updating fwnode's.
Start adding higher level API which isn't tied to if_fw/mbuf's
diffstat:
sys/dev/ieee1394/fwohci.c | 1102 +++++++++++++++++++++++++++++++++++---------
1 files changed, 871 insertions(+), 231 deletions(-)
diffs (truncated from 1498 to 300 lines):
diff -r 0ca3b06bf5de -r 418f646db8bd sys/dev/ieee1394/fwohci.c
--- a/sys/dev/ieee1394/fwohci.c Tue May 01 04:48:10 2001 +0000
+++ b/sys/dev/ieee1394/fwohci.c Tue May 01 04:48:10 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fwohci.c,v 1.23 2001/04/13 23:30:08 thorpej Exp $ */
+/* $NetBSD: fwohci.c,v 1.24 2001/05/01 04:48:11 jmc Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -47,6 +47,7 @@
#include <sys/param.h>
#include <sys/systm.h>
+#include <sys/kthread.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <sys/callout.h>
@@ -62,6 +63,7 @@
#endif
#include <machine/bus.h>
+#include <machine/intr.h>
#include <dev/ieee1394/ieee1394reg.h>
#include <dev/ieee1394/fwohcireg.h>
@@ -75,6 +77,10 @@
static int fwohci_dnamem_alloc(struct fwohci_softc *sc, int size, int alignment,
bus_dmamap_t *mapp, caddr_t *kvap, int flags);
#endif
+static void fwohci_create_event_thread(void *);
+static void fwohci_thread_init(void *);
+
+static void fwohci_event_thread(struct fwohci_softc *);
static void fwohci_hw_init(struct fwohci_softc *);
static void fwohci_power(int, void *);
static void fwohci_shutdown(void *);
@@ -120,7 +126,8 @@
static int fwohci_guidrom_init(struct fwohci_softc *);
static void fwohci_configrom_init(struct fwohci_softc *);
-
+static int fwohci_configrom_input(struct fwohci_softc *, void *,
+ struct fwohci_pkt *);
static void fwohci_selfid_init(struct fwohci_softc *);
static int fwohci_selfid_input(struct fwohci_softc *);
@@ -132,16 +139,26 @@
static int fwohci_uid_input(struct fwohci_softc *, void *,
struct fwohci_pkt *);
static int fwohci_uid_lookup(struct fwohci_softc *, const u_int8_t *);
+static void fwohci_check_nodes(struct fwohci_softc *);
static int fwohci_if_inreg(struct device *, u_int32_t, u_int32_t,
void (*)(struct device *, struct mbuf *));
static int fwohci_if_input(struct fwohci_softc *, void *, struct fwohci_pkt *);
static int fwohci_if_output(struct device *, struct mbuf *,
void (*)(struct device *, struct mbuf *));
+static int fwohci_input(struct ieee1394_abuf *);
+static int fwohci_output(struct ieee1394_abuf *);
+static int fwohci_extract_resp(struct fwohci_softc *, void *,
+ struct fwohci_pkt *);
+static int fwohci_multi_resp(struct fwohci_softc *, void *,
+ struct fwohci_pkt *);
+static int fwohci_inreg(struct ieee1394_abuf *, int);
+static int fwohci_parse_input(struct fwohci_softc *, void *,
+ struct fwohci_pkt *);
#ifdef FW_DEBUG
int fw_verbose = 1;
-int fw_dump = 0;
+int fw_dump = 1;
#endif
int
@@ -171,6 +188,8 @@
printf("%s: OHCI %u.%u", sc->sc_sc1394.sc1394_dev.dv_xname,
OHCI_Version_GET_Version(val), OHCI_Version_GET_Revision(val));
+ LIST_INIT(&sc->sc_nodelist);
+
if (fwohci_guidrom_init(sc) != 0) {
printf("\n%s: fatal: no global UID ROM\n",
sc->sc_sc1394.sc1394_dev.dv_xname);
@@ -223,60 +242,9 @@
return error;
#endif
- /*
- * Enable Link Power
- */
- OHCI_CSR_WRITE(sc, OHCI_REG_HCControlSet, OHCI_HCControl_LPS);
-
- /*
- * Allocate descriptors
- */
- if (fwohci_desc_alloc(sc))
- return -1;
-
- /*
- * Allocate DMA Context
- */
- fwohci_ctx_alloc(sc, &sc->sc_ctx_arrq, OHCI_BUF_ARRQ_CNT,
- OHCI_CTX_ASYNC_RX_REQUEST);
- fwohci_ctx_alloc(sc, &sc->sc_ctx_arrs, OHCI_BUF_ARRS_CNT,
- OHCI_CTX_ASYNC_RX_RESPONSE);
- fwohci_ctx_alloc(sc, &sc->sc_ctx_atrq, 0, OHCI_CTX_ASYNC_TX_REQUEST);
- fwohci_ctx_alloc(sc, &sc->sc_ctx_atrs, 0, OHCI_CTX_ASYNC_TX_RESPONSE);
- sc->sc_ctx_ir = malloc(sizeof(sc->sc_ctx_ir[0]) * sc->sc_isoctx,
- M_DEVBUF, M_WAITOK);
- for (i = 0; i < sc->sc_isoctx; i++)
- sc->sc_ctx_ir[i] = NULL;
+ sc->sc_dying = 0;
- /*
- * Allocate buffer for configuration ROM and SelfID buffer
- */
- fwohci_buf_alloc(sc, &sc->sc_buf_cnfrom);
- fwohci_buf_alloc(sc, &sc->sc_buf_selfid);
-
- /*
- * establish hooks for shutdown and suspend/resume
- */
- sc->sc_shutdownhook = shutdownhook_establish(fwohci_shutdown, sc);
- sc->sc_powerhook = powerhook_establish(fwohci_power, sc);
- callout_init(&sc->sc_selfid_callout);
-
- /*
- * Initialize hardware registers.
- */
- fwohci_hw_init(sc);
-
- /*
- * Initiate Bus Reset
- */
- config_defer(&sc->sc_sc1394.sc1394_dev,
- (void (*)(struct device *))fwohci_phy_busreset);
-
- sc->sc_sc1394.sc1394_ifinreg = fwohci_if_inreg;
- sc->sc_sc1394.sc1394_ifoutput = fwohci_if_output;
- sc->sc_sc1394.sc1394_if = config_found(&sc->sc_sc1394.sc1394_dev,
- "fw", fwohci_print);
-
+ kthread_create(fwohci_create_event_thread, sc);
return 0;
}
@@ -284,14 +252,27 @@
fwohci_intr(void *arg)
{
struct fwohci_softc * const sc = arg;
- int i;
int progress = 0;
u_int32_t intmask, iso;
for (;;) {
intmask = OHCI_CSR_READ(sc, OHCI_REG_IntEventClear);
- if (intmask == 0)
- return progress;
+
+ /*
+ * On a bus reset, everything except bus reset gets cleared. That
+ * can't get cleared until the selfid phase completes (which
+ * happens outside the interrupt routines). So if just a bus
+ * reset is left in the mask and it's already in the sc_intmask,
+ * just return.
+ */
+
+ if ((intmask == 0) ||
+ (progress && (intmask == OHCI_Int_BusReset) &&
+ (sc->sc_intmask & OHCI_Int_BusReset))) {
+ if (progress)
+ wakeup(fwohci_event_thread);
+ return progress;
+ }
OHCI_CSR_WRITE(sc, OHCI_REG_IntEventClear,
intmask & ~OHCI_Int_BusReset);
#ifdef FW_DEBUG
@@ -363,56 +344,36 @@
* bit of BusReset instead until SelfID completion
* or SelfID timeout.
*/
- OHCI_CSR_WRITE(sc, OHCI_REG_IntMaskClear,
- OHCI_Int_BusReset);
intmask &= OHCI_Int_SelfIDComplete;
- fwohci_buf_stop(sc);
- fwohci_buf_init(sc);
- if (sc->sc_uidtbl != NULL) {
- free(sc->sc_uidtbl, M_DEVBUF);
- sc->sc_uidtbl = NULL;
- }
- callout_reset(&sc->sc_selfid_callout,
- OHCI_SELFID_TIMEOUT,
- (void (*)(void *))fwohci_phy_busreset, sc);
- sc->sc_nodeid = 0xffff; /* indicate invalid */
- sc->sc_rootid = 0;
- sc->sc_irmid = IEEE1394_BCAST_PHY_ID;
+ OHCI_CSR_WRITE(sc, OHCI_REG_IntMaskClear,
+ OHCI_Int_BusReset);
+ sc->sc_intmask = intmask;
+ sc->sc_intmask |= OHCI_Int_BusReset;
+
}
- if (intmask & OHCI_Int_SelfIDComplete) {
- OHCI_CSR_WRITE(sc, OHCI_REG_IntEventClear,
- OHCI_Int_BusReset);
- OHCI_CSR_WRITE(sc, OHCI_REG_IntMaskSet,
- OHCI_Int_BusReset);
- callout_stop(&sc->sc_selfid_callout);
- if (fwohci_selfid_input(sc) == 0) {
- fwohci_buf_start(sc);
- fwohci_uid_collect(sc);
- }
- }
+ if (intmask & OHCI_Int_SelfIDComplete)
+ sc->sc_intmask |= OHCI_Int_SelfIDComplete;
if (intmask & OHCI_Int_ReqTxComplete)
- fwohci_at_done(sc, sc->sc_ctx_atrq, 0);
+ sc->sc_intmask |= OHCI_Int_ReqTxComplete;
if (intmask & OHCI_Int_RespTxComplete)
- fwohci_at_done(sc, sc->sc_ctx_atrs, 0);
+ sc->sc_intmask |= OHCI_Int_RespTxComplete;
if (intmask & OHCI_Int_RQPkt)
- fwohci_arrq_input(sc, sc->sc_ctx_arrq);
+ sc->sc_intmask |= OHCI_Int_RQPkt;
if (intmask & OHCI_Int_RSPkt)
- fwohci_arrs_input(sc, sc->sc_ctx_arrs);
-
+ sc->sc_intmask |= OHCI_Int_RSPkt;
if (intmask & OHCI_Int_IsochTx) {
- iso = OHCI_CSR_READ(sc, OHCI_REG_IsoXmitIntEventClear);
- OHCI_CSR_WRITE(sc, OHCI_REG_IsoXmitIntEventClear, iso);
- }
+ iso = OHCI_CSR_READ(sc, OHCI_REG_IsoXmitIntEventClear);
+ OHCI_CSR_WRITE(sc, OHCI_REG_IsoXmitIntEventClear, iso);
+ sc->sc_intmask |= OHCI_Int_IsochTx;
+ }
if (intmask & OHCI_Int_IsochRx) {
- iso = OHCI_CSR_READ(sc, OHCI_REG_IsoRecvIntEventClear);
- OHCI_CSR_WRITE(sc, OHCI_REG_IsoRecvIntEventClear, iso);
- for (i = 0; i < sc->sc_isoctx; i++) {
- if ((iso & (1<<i)) && sc->sc_ctx_ir[i] != NULL)
- fwohci_ir_input(sc, sc->sc_ctx_ir[i]);
- }
- }
+ iso = OHCI_CSR_READ(sc, OHCI_REG_IsoRecvIntEventClear);
+ OHCI_CSR_WRITE(sc, OHCI_REG_IsoRecvIntEventClear, iso);
+ sc->sc_iso |= iso;
+ sc->sc_intmask |= OHCI_Int_IsochRx;
+ }
if (!progress) {
sc->sc_intrcnt.ev_count++;
@@ -421,6 +382,186 @@
}
}
+static void
+fwohci_create_event_thread(void *arg)
+{
+ struct fwohci_softc *sc = arg;
+
+ if (kthread_create1(fwohci_thread_init, sc, &sc->sc_event_thread, "%s",
+ sc->sc_sc1394.sc1394_dev.dv_xname)) {
+ printf("%s: unable to create event thread\n",
+ sc->sc_sc1394.sc1394_dev.dv_xname);
+ panic("fwohci_create_event_thread");
+ }
+}
+
+static void
+fwohci_thread_init(void *arg)
+{
+ struct fwohci_softc *sc = arg;
+ int i;
+
+ /*
+ * Allocate descriptors
+ */
+ if (fwohci_desc_alloc(sc)) {
+ printf("%s: not enabling interrupts\n",
+ sc->sc_sc1394.sc1394_dev.dv_xname);
+ kthread_exit(1);
+ }
+
+ /*
+ * Enable Link Power
+ */
+
+ OHCI_CSR_WRITE(sc, OHCI_REG_HCControlSet, OHCI_HCControl_LPS);
+
+ /*
+ * Allocate DMA Context
+ */
+ fwohci_ctx_alloc(sc, &sc->sc_ctx_arrq, OHCI_BUF_ARRQ_CNT,
+ OHCI_CTX_ASYNC_RX_REQUEST);
+ fwohci_ctx_alloc(sc, &sc->sc_ctx_arrs, OHCI_BUF_ARRS_CNT,
+ OHCI_CTX_ASYNC_RX_RESPONSE);
+ fwohci_ctx_alloc(sc, &sc->sc_ctx_atrq, 0, OHCI_CTX_ASYNC_TX_REQUEST);
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