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[src/trunk]: src/sys/arch Rename map_section() to pmap_map_section(), move it...
details: https://anonhg.NetBSD.org/src/rev/aa12fbb9e800
branches: trunk
changeset: 522475:aa12fbb9e800
user: thorpej <thorpej%NetBSD.org@localhost>
date: Wed Feb 20 00:10:15 2002 +0000
description:
Rename map_section() to pmap_map_section(), move it to pmap.c, and give it
an extra argument (prot - specifies protection of the mapping).
diffstat:
sys/arch/acorn32/acorn32/rpc_machdep.c | 31 +++++++++-----
sys/arch/acorn32/podulebus/podulebus.c | 15 +++---
sys/arch/arm/arm32/arm32_machdep.c | 23 +----------
sys/arch/arm/arm32/pmap.c | 24 ++++++++++-
sys/arch/arm/include/arm32/machdep.h | 3 +-
sys/arch/arm/include/arm32/pmap.h | 14 ++++++-
sys/arch/cats/cats/cats_machdep.c | 41 ++++++++++++++-----
sys/arch/evbarm/integrator/integrator_machdep.c | 27 +++++++-----
sys/arch/evbarm/iq80310/iq80310_machdep.c | 15 ++++--
sys/arch/hpcarm/hpcarm/hpc_machdep.c | 4 +-
sys/arch/netwinder/netwinder/netwinder_machdep.c | 49 ++++++++++++++++-------
sys/arch/shark/ofw/ofw.c | 19 ++------
12 files changed, 158 insertions(+), 107 deletions(-)
diffs (truncated from 603 to 300 lines):
diff -r 9e7cab1e8dd3 -r aa12fbb9e800 sys/arch/acorn32/acorn32/rpc_machdep.c
--- a/sys/arch/acorn32/acorn32/rpc_machdep.c Tue Feb 19 23:11:28 2002 +0000
+++ b/sys/arch/acorn32/acorn32/rpc_machdep.c Wed Feb 20 00:10:15 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rpc_machdep.c,v 1.16 2002/02/18 13:53:29 bjh21 Exp $ */
+/* $NetBSD: rpc_machdep.c,v 1.17 2002/02/20 00:10:15 thorpej Exp $ */
/*
* Copyright (c) 2000-2001 Reinoud Zandijk.
@@ -57,7 +57,7 @@
#include <sys/param.h>
-__RCSID("$NetBSD: rpc_machdep.c,v 1.16 2002/02/18 13:53:29 bjh21 Exp $");
+__RCSID("$NetBSD: rpc_machdep.c,v 1.17 2002/02/20 00:10:15 thorpej Exp $");
#include <sys/systm.h>
#include <sys/kernel.h>
@@ -186,8 +186,6 @@
void physcon_display_base __P((u_int addr));
extern void consinit __P((void));
-void map_section __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa,
- int cacheable));
void map_pagetable __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa));
void map_entry __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa));
void map_entry_nc __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa));
@@ -384,18 +382,25 @@
vm_offset_t va;
vm_offset_t pa;
vm_size_t size;
- int flags;
+ vm_prot_t prot;
+ int cache;
} l1_sec_table[] = {
/* Map 1Mb section for VIDC20 */
{ VIDC_BASE, VIDC_HW_BASE,
- ONE_MB, 0 },
+ ONE_MB, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE },
+
/* Map 1Mb section from IOMD */
{ IOMD_BASE, IOMD_HW_BASE,
- ONE_MB, 0 },
+ ONE_MB, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE },
+
/* Map 1Mb of COMBO (and module space) */
{ IO_BASE, IO_HW_BASE,
- ONE_MB, 0 },
- { 0, 0, 0, 0 }
+ ONE_MB, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE },
+
+ { 0, 0, 0, 0, 0 }
};
@@ -811,9 +816,11 @@
l1_sec_table[loop].va);
#endif
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
- map_section(l1pagetable, l1_sec_table[loop].va + sz,
- l1_sec_table[loop].pa + sz,
- l1_sec_table[loop].flags);
+ pmap_map_section(l1pagetable,
+ l1_sec_table[loop].va + sz,
+ l1_sec_table[loop].pa + sz,
+ l1_sec_table[loop].prot,
+ l1_sec_table[loop].cache);
++loop;
}
diff -r 9e7cab1e8dd3 -r aa12fbb9e800 sys/arch/acorn32/podulebus/podulebus.c
--- a/sys/arch/acorn32/podulebus/podulebus.c Tue Feb 19 23:11:28 2002 +0000
+++ b/sys/arch/acorn32/podulebus/podulebus.c Wed Feb 20 00:10:15 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: podulebus.c,v 1.5 2002/02/18 13:11:07 bjh21 Exp $ */
+/* $NetBSD: podulebus.c,v 1.6 2002/02/20 00:10:16 thorpej Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -43,7 +43,7 @@
#include <sys/param.h>
-__RCSID("$NetBSD: podulebus.c,v 1.5 2002/02/18 13:11:07 bjh21 Exp $");
+__RCSID("$NetBSD: podulebus.c,v 1.6 2002/02/20 00:10:16 thorpej Exp $");
#include <sys/systm.h>
#include <sys/kernel.h>
@@ -72,7 +72,6 @@
/* Declare prototypes */
-void map_section __P((vm_offset_t, vm_offset_t, vm_offset_t, int cacheable));
u_int poduleread __P((u_int, int));
int podulebusmatch(struct device *, struct cfdata *, void *);
void podulebusattach(struct device *, struct device *, void *);
@@ -443,8 +442,9 @@
/* Map the FAST and SYNC simple podules */
- map_section((vm_offset_t)pmap_kernel()->pm_pdir,
- SYNC_PODULE_BASE & 0xfff00000, SYNC_PODULE_HW_BASE & 0xfff00000, 0);
+ pmap_map_section((vm_offset_t)pmap_kernel()->pm_pdir,
+ SYNC_PODULE_BASE & 0xfff00000, SYNC_PODULE_HW_BASE & 0xfff00000,
+ VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
cpu_tlb_flushD();
/* Now map the EASI space */
@@ -454,8 +454,9 @@
for (loop1 = loop * EASI_SIZE; loop1 < ((loop + 1) * EASI_SIZE);
loop1 += L1_SEC_SIZE)
- map_section((vm_offset_t)pmap_kernel()->pm_pdir, EASI_BASE + loop1,
- EASI_HW_BASE + loop1, 0);
+ pmap_map_section((vm_offset_t)pmap_kernel()->pm_pdir,
+ EASI_BASE + loop1, EASI_HW_BASE + loop1,
+ VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
}
cpu_tlb_flushD();
diff -r 9e7cab1e8dd3 -r aa12fbb9e800 sys/arch/arm/arm32/arm32_machdep.c
--- a/sys/arch/arm/arm32/arm32_machdep.c Tue Feb 19 23:11:28 2002 +0000
+++ b/sys/arch/arm/arm32/arm32_machdep.c Wed Feb 20 00:10:15 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_machdep.c,v 1.12 2002/02/10 13:20:26 reinoud Exp $ */
+/* $NetBSD: arm32_machdep.c,v 1.13 2002/02/20 00:10:17 thorpej Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -156,27 +156,6 @@
*/
void
-map_section(pagetable, va, pa, cacheable)
- vaddr_t pagetable;
- vaddr_t va;
- paddr_t pa;
- int cacheable;
-{
-#ifdef DIAGNOSTIC
- if (((va | pa) & (L1_SEC_SIZE - 1)) != 0)
- panic("initarm: Cannot allocate 1MB section on non 1MB boundry\n");
-#endif /* DIAGNOSTIC */
-
- if (cacheable)
- ((u_int *)pagetable)[(va >> PDSHIFT)] =
- L1_SEC((pa & PD_MASK), pte_cache_mode);
- else
- ((u_int *)pagetable)[(va >> PDSHIFT)] =
- L1_SEC((pa & PD_MASK), 0);
-}
-
-
-void
map_pagetable(pagetable, va, pa)
vaddr_t pagetable;
vaddr_t va;
diff -r 9e7cab1e8dd3 -r aa12fbb9e800 sys/arch/arm/arm32/pmap.c
--- a/sys/arch/arm/arm32/pmap.c Tue Feb 19 23:11:28 2002 +0000
+++ b/sys/arch/arm/arm32/pmap.c Wed Feb 20 00:10:15 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.39 2002/02/06 17:41:42 thorpej Exp $ */
+/* $NetBSD: pmap.c,v 1.40 2002/02/20 00:10:17 thorpej Exp $ */
/*
* Copyright (c) 2001 Richard Earnshaw
@@ -142,7 +142,7 @@
#include <machine/param.h>
#include <arm/arm32/katelib.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.39 2002/02/06 17:41:42 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.40 2002/02/20 00:10:17 thorpej Exp $");
#ifdef PMAP_DEBUG
#define PDEBUG(_lev_,_stat_) \
if (pmap_debug_level >= (_lev_)) \
@@ -3720,4 +3720,22 @@
return (ptp);
}
-/* End of pmap.c */
+/************************ Bootstrapping routines ****************************/
+
+/*
+ * pmap_map_section:
+ *
+ * Create a single section mapping.
+ */
+void
+pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, int prot, int cache)
+{
+ pd_entry_t *pde = (pd_entry_t *) l1pt;
+
+ KASSERT(((va | pa) & (L1_SEC_SIZE - 1)) == 0);
+
+ /* XXXJRT Always creates r/w mappings for now */
+
+ pde[va >> PDSHIFT] = L1_SEC(pa & PD_MASK,
+ cache == PTE_CACHE ? pte_cache_mode : 0);
+}
diff -r 9e7cab1e8dd3 -r aa12fbb9e800 sys/arch/arm/include/arm32/machdep.h
--- a/sys/arch/arm/include/arm32/machdep.h Tue Feb 19 23:11:28 2002 +0000
+++ b/sys/arch/arm/include/arm32/machdep.h Wed Feb 20 00:10:15 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.h,v 1.3 2002/01/20 03:41:48 thorpej Exp $ */
+/* $NetBSD: machdep.h,v 1.4 2002/02/20 00:10:18 thorpej Exp $ */
#ifndef _ARM32_BOOT_MACHDEP_H_
#define _ARM32_BOOT_MACHDEP_H_
@@ -11,7 +11,6 @@
void undefinedinstruction_bounce __P((trapframe_t *));
void dumpsys __P((void));
-void map_section(vaddr_t, vaddr_t, paddr_t, int);
void map_pagetable(vaddr_t, vaddr_t, paddr_t);
void map_entry(vaddr_t, vaddr_t, paddr_t);
void map_entry_nc(vaddr_t, vaddr_t, paddr_t);
diff -r 9e7cab1e8dd3 -r aa12fbb9e800 sys/arch/arm/include/arm32/pmap.h
--- a/sys/arch/arm/include/arm32/pmap.h Tue Feb 19 23:11:28 2002 +0000
+++ b/sys/arch/arm/include/arm32/pmap.h Wed Feb 20 00:10:15 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.23 2002/02/06 17:41:44 thorpej Exp $ */
+/* $NetBSD: pmap.h,v 1.24 2002/02/20 00:10:18 thorpej Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe.
@@ -138,6 +138,15 @@
} pv_addr_t;
/*
+ * Determine various modes for PTEs (user vs. kernel, cacheable
+ * vs. non-cacheable).
+ */
+#define PTE_KERNEL 0
+#define PTE_USER 1
+#define PTE_NOCACHE 0
+#define PTE_CACHE 1
+
+/*
* _KERNEL specific macros, functions and prototypes
*/
@@ -176,6 +185,9 @@
void pmap_postinit __P((void));
pt_entry_t *pmap_pte __P((struct pmap *, vaddr_t));
+/* Bootstrapping routines. */
+void pmap_map_section(vaddr_t, vaddr_t, paddr_t, int, int);
+
/*
* Special page zero routine for use by the idle loop (no cache cleans).
*/
diff -r 9e7cab1e8dd3 -r aa12fbb9e800 sys/arch/cats/cats/cats_machdep.c
--- a/sys/arch/cats/cats/cats_machdep.c Tue Feb 19 23:11:28 2002 +0000
+++ b/sys/arch/cats/cats/cats_machdep.c Wed Feb 20 00:10:15 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cats_machdep.c,v 1.15 2002/02/10 13:19:27 chris Exp $ */
+/* $NetBSD: cats_machdep.c,v 1.16 2002/02/20 00:10:18 thorpej Exp $ */
/*
* Copyright (c) 1997,1998 Mark Brinicombe.
@@ -274,30 +274,45 @@
vm_offset_t va;
vm_offset_t pa;
vm_size_t size;
- int flags;
+ vm_prot_t prot;
+ int cache;
} l1_sec_table[] = {
/* Map 1MB for CSR space */
{ DC21285_ARMCSR_VBASE, DC21285_ARMCSR_BASE,
- DC21285_ARMCSR_VSIZE, 0 },
+ DC21285_ARMCSR_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE },
+
/* Map 1MB for fast cache cleaning space */
{ DC21285_CACHE_FLUSH_VBASE, DC21285_SA_CACHE_FLUSH_BASE,
- DC21285_CACHE_FLUSH_VSIZE, 1 },
+ DC21285_CACHE_FLUSH_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_CACHE },
+
/* Map 1MB for PCI IO space */
{ DC21285_PCI_IO_VBASE, DC21285_PCI_IO_BASE,
- DC21285_PCI_IO_VSIZE, 0 },
+ DC21285_PCI_IO_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE },
+
/* Map 1MB for PCI IACK space */
{ DC21285_PCI_IACK_VBASE, DC21285_PCI_IACK_SPECIAL,
- DC21285_PCI_IACK_VSIZE, 0 },
+ DC21285_PCI_IACK_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE },
+
/* Map 16MB of type 1 PCI config access */
{ DC21285_PCI_TYPE_1_CONFIG_VBASE, DC21285_PCI_TYPE_1_CONFIG,
- DC21285_PCI_TYPE_1_CONFIG_VSIZE, 0 },
+ DC21285_PCI_TYPE_1_CONFIG_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
+ PTE_NOCACHE },
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