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[src/sommerfeld_i386mp_1]: src/sys/arch/i386 (Untested) code for EISA interru...
details: https://anonhg.NetBSD.org/src/rev/f136d31d4265
branches: sommerfeld_i386mp_1
changeset: 482211:f136d31d4265
user: sommerfeld <sommerfeld%NetBSD.org@localhost>
date: Tue Feb 29 13:20:06 2000 +0000
description:
(Untested) code for EISA interrupt routing.
diffstat:
sys/arch/i386/eisa/eisa_machdep.c | 45 +++++++++++++-
sys/arch/i386/i386/mpbios.c | 123 +++++++++++++++++++++++++++++++------
2 files changed, 145 insertions(+), 23 deletions(-)
diffs (truncated from 314 to 300 lines):
diff -r 90ea9cfa6c78 -r f136d31d4265 sys/arch/i386/eisa/eisa_machdep.c
--- a/sys/arch/i386/eisa/eisa_machdep.c Tue Feb 29 13:17:51 2000 +0000
+++ b/sys/arch/i386/eisa/eisa_machdep.c Tue Feb 29 13:20:06 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: eisa_machdep.c,v 1.10 1998/06/03 06:35:49 thorpej Exp $ */
+/* $NetBSD: eisa_machdep.c,v 1.10.22.1 2000/02/29 13:20:06 sommerfeld Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -141,6 +141,9 @@
u_int irq;
eisa_intr_handle_t *ihp;
{
+#if NIOAPIC > 0
+ struct mp_intr_map *mip;
+#endif
if (irq >= ICU_LEN) {
printf("eisa_intr_map: bad IRQ %d\n", irq);
@@ -152,6 +155,26 @@
irq = 9;
}
+#if NIOAPIC > 0
+ if (mp_busses != NULL) {
+ /*
+ * Assumes 1:1 mapping between PCI bus numbers and
+ * the numbers given by the MP bios.
+ * XXX Is this a valid assumption?
+ */
+
+ for (mip = mp_busses[bus].mb_intrs; mip != NULL; mip=mip->next) {
+ if (mip->bus_pin == irq) {
+ *ihp = mip->ioapic_ih | irq;
+ return 0;
+ }
+ }
+ if (mip == NULL)
+ printf("eisa_intr_map: no MP mapping found\n");
+ }
+#endif
+
+
*ihp = irq;
return 0;
}
@@ -163,10 +186,20 @@
{
static char irqstr[8]; /* 4 + 2 + NULL + sanity */
- if (ih == 0 || ih >= ICU_LEN || ih == 2)
+ if (ih == 0 || (ih & 0xff) >= ICU_LEN || ih == 2)
panic("eisa_intr_string: bogus handle 0x%x\n", ih);
+#if NIOAPIC > 0
+ if (ih & APIC_INT_VIA_APIC)
+ sprintf(irqstr, "apic %d int %d (irq %d)",
+ APIC_IRQ_APIC(ih),
+ APIC_IRQ_PIN(ih),
+ ih&0xff);
+ else
+ sprintf(irqstr, "irq %d", ih&0xff);
+#else
sprintf(irqstr, "irq %d", ih);
+#endif
return (irqstr);
}
@@ -178,6 +211,14 @@
int type, level, (*func) __P((void *));
void *arg;
{
+ if (ih != -1) {
+#if NIOAPIC > 0
+ if (ih & APIC_INT_VIA_APIC) {
+ return apic_intr_establish(ih, type, level,
+ func, arg);
+ }
+#endif
+ }
if (ih == 0 || ih >= ICU_LEN || ih == 2)
panic("eisa_intr_establish: bogus handle 0x%x\n", ih);
diff -r 90ea9cfa6c78 -r f136d31d4265 sys/arch/i386/i386/mpbios.c
--- a/sys/arch/i386/i386/mpbios.c Tue Feb 29 13:17:51 2000 +0000
+++ b/sys/arch/i386/i386/mpbios.c Tue Feb 29 13:20:06 2000 +0000
@@ -95,7 +95,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id: mpbios.c,v 1.1.2.3 2000/02/27 21:47:05 sommerfeld Exp $
+ * $Id: mpbios.c,v 1.1.2.4 2000/02/29 13:20:07 sommerfeld Exp $
*/
/*
@@ -134,6 +134,9 @@
#include <dev/ic/mc146818reg.h> /* for NVRAM POST */
#include <i386/isa/nvram.h> /* for NVRAM POST */
+#include <dev/eisa/eisavar.h> /* for ELCR* def'ns */
+
+
static struct mpbios_ioapic default_ioapic = {
2,0,1,IOAPICENTRY_FLAG_EN,(caddr_t)IOAPIC_BASE_DEFAULT
};
@@ -168,11 +171,13 @@
struct mp_map *));
static inline int mpbios_cksum __P((const void *,int));
-static void mp_cfg_special_intr (int mpstype, int mpsflags, u_int32_t *redir);
-static void mp_cfg_pci_intr (int mpstype, int mpsflags, u_int32_t *redir);
-static void mp_cfg_isa_intr (int mpstype, int mpsflags, u_int32_t *redir);
+static void mp_cfg_special_intr __P((const struct mpbios_int *, u_int32_t *));
+static void mp_cfg_pci_intr __P((const struct mpbios_int *, u_int32_t *));
+static void mp_cfg_eisa_intr __P((const struct mpbios_int *, u_int32_t *));
+static void mp_cfg_isa_intr __P((const struct mpbios_int *, u_int32_t *));
static void mp_print_special_intr (int intr);
static void mp_print_pci_intr (int intr);
+static void mp_print_eisa_intr (int intr);
static void mp_print_isa_intr (int intr);
static void mpbios_cpu __P((const u_int8_t *, struct device *));
@@ -695,8 +700,11 @@
*
* Fill in: trigger mode, polarity, and possibly delivery mode.
*/
-static void mp_cfg_special_intr (int mpstype, int mpsflags, u_int32_t *redir)
+static void mp_cfg_special_intr (entry, redir)
+ const struct mpbios_int *entry;
+ u_int32_t *redir;
{
+
/*
* All of these require edge triggered, zero vector,
* appropriate delivery mode.
@@ -706,7 +714,7 @@
*redir &= ~IOAPIC_REDLO_VECTOR_MASK;
*redir &= ~IOAPIC_REDLO_LEVEL;
- switch (mpstype) {
+ switch (entry->int_type) {
case MPS_INTTYPE_NMI:
*redir |= (IOAPIC_REDLO_DEL_NMI<<IOAPIC_REDLO_DEL_SHIFT);
break;
@@ -724,16 +732,18 @@
*redir |= (IOAPIC_REDLO_MASK);
break;
default:
- panic("unknown MPS interrupt type %d", mpstype);
+ panic("unknown MPS interrupt type %d", entry->int_type);
}
}
/* XXX too much duplicated code here. */
-static void mp_cfg_pci_intr (int mpstype, int mpsflags, u_int32_t *redir)
+static void mp_cfg_pci_intr (entry, redir)
+ const struct mpbios_int *entry;
+ u_int32_t *redir;
{
- int mpspo = mpsflags & 0x03; /* XXX magic */
- int mpstrig = (mpsflags >> 2) & 0x03; /* XXX magic */
+ int mpspo = entry->int_flags & 0x03; /* XXX magic */
+ int mpstrig = (entry->int_flags >> 2) & 0x03; /* XXX magic */
*redir &= ~IOAPIC_REDLO_DEL_MASK;
switch (mpspo) {
@@ -748,8 +758,8 @@
panic("unknown MPS interrupt polarity %d", mpspo);
}
- if (mpstype != MPS_INTTYPE_INT) {
- mp_cfg_special_intr(mpstype, mpsflags, redir);
+ if (entry->int_type != MPS_INTTYPE_INT) {
+ mp_cfg_special_intr(entry, redir);
return;
}
*redir |= (IOAPIC_REDLO_DEL_LOPRI<<IOAPIC_REDLO_DEL_SHIFT);
@@ -767,10 +777,12 @@
}
}
-static void mp_cfg_isa_intr (int mpstype, int mpsflags, u_int32_t *redir)
+static void mp_cfg_eisa_intr (entry, redir)
+ const struct mpbios_int *entry;
+ u_int32_t *redir;
{
- int mpspo = mpsflags & 0x03; /* XXX magic */
- int mpstrig = (mpsflags >> 2) & 0x03; /* XXX magic */
+ int mpspo = entry->int_flags & 0x03; /* XXX magic */
+ int mpstrig = (entry->int_flags >> 2) & 0x03; /* XXX magic */
*redir &= ~IOAPIC_REDLO_DEL_MASK;
switch (mpspo) {
@@ -785,8 +797,59 @@
panic("unknown MPS interrupt polarity %d", mpspo);
}
- if (mpstype != MPS_INTTYPE_INT) {
- mp_cfg_special_intr(mpstype, mpsflags, redir);
+ if (entry->int_type != MPS_INTTYPE_INT) {
+ mp_cfg_special_intr(entry, redir);
+ return;
+ }
+ *redir |= (IOAPIC_REDLO_DEL_LOPRI<<IOAPIC_REDLO_DEL_SHIFT);
+
+ switch (mpstrig) {
+ case MPS_INTTR_LEVEL:
+ *redir |= IOAPIC_REDLO_LEVEL;
+ break;
+ case MPS_INTTR_EDGE:
+ *redir &= ~IOAPIC_REDLO_LEVEL;
+ break;
+ case MPS_INTTR_DEF:
+ /*
+ * Set "default" setting based on ELCR value snagged
+ * earlier.
+ */
+ if (mp_busses[entry->src_bus_id].mb_data &
+ (1<<entry->src_bus_irq)) {
+ *redir |= IOAPIC_REDLO_LEVEL;
+ } else {
+ *redir &= ~IOAPIC_REDLO_LEVEL;
+ }
+ break;
+ default:
+ panic("unknown MPS interrupt trigger %d", mpstrig);
+ }
+}
+
+
+static void mp_cfg_isa_intr (entry, redir)
+ const struct mpbios_int *entry;
+ u_int32_t *redir;
+{
+ int mpspo = entry->int_flags & 0x03; /* XXX magic */
+ int mpstrig = (entry->int_flags >> 2) & 0x03; /* XXX magic */
+
+ *redir &= ~IOAPIC_REDLO_DEL_MASK;
+ switch (mpspo) {
+ case MPS_INTPO_DEF:
+ case MPS_INTPO_ACTHI:
+ *redir &= ~IOAPIC_REDLO_ACTLO;
+ break;
+ case MPS_INTPO_ACTLO:
+ *redir |= IOAPIC_REDLO_ACTLO;
+ break;
+ default:
+ panic("unknown MPS interrupt polarity %d", mpspo);
+ }
+
+ if (entry->int_type != MPS_INTTYPE_INT) {
+ mp_cfg_special_intr(entry, redir);
return;
}
*redir |= (IOAPIC_REDLO_DEL_LOPRI<<IOAPIC_REDLO_DEL_SHIFT);
@@ -805,20 +868,29 @@
}
-static void mp_print_special_intr (int intr)
+static void mp_print_special_intr (intr)
+ int intr;
{
}
-static void mp_print_pci_intr (int intr)
+static void mp_print_pci_intr (intr)
+ int intr;
{
printf(" device %d INT_%c", (intr>>2)&0x1f, 'A' + (intr & 0x3));
}
-static void mp_print_isa_intr (int intr)
+static void mp_print_isa_intr (intr)
+ int intr;
{
printf(" irq %d", intr);
}
+static void mp_print_eisa_intr (intr)
+ int intr;
+{
+ printf(" EISA irq %d", intr);
+}
+
#define TAB_UNIT 4
@@ -841,6 +913,15 @@
mp_busses[entry->bus_id].mb_idx = entry->bus_id;
mp_busses[entry->bus_id].mb_intr_print = mp_print_pci_intr;
mp_busses[entry->bus_id].mb_intr_cfg = mp_cfg_pci_intr;
+ } else if (memcmp(entry->bus_type, "EISA ", 6) == 0) {
+ mp_busses[entry->bus_id].mb_name = "eisa";
+ mp_busses[entry->bus_id].mb_idx = entry->bus_id;
+ mp_busses[entry->bus_id].mb_intr_print = mp_print_eisa_intr;
+ mp_busses[entry->bus_id].mb_intr_cfg = mp_cfg_eisa_intr;
+
+ mp_busses[entry->bus_id].mb_data =
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