[src/netbsd-3]: src/sys/arch/mips/mips Pull up following revision(s) (request...

[tron <tron%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/7a36be1fcfdb
branches:  netbsd-3
changeset: 577508:7a36be1fcfdb
user:      tron <tron%NetBSD.org@localhost>
date:      Mon Nov 21 20:04:44 2005 +0000

description:
Pull up following revision(s) (requested by tsutsui in ticket #961):
        sys/arch/mips/mips/cache.c: revision 1.30
Partially revert change in sys/arch/mips/mips/cache.c rev 1.27,
i.e. override mips_cache_alias_mask and mips_cache_prefer_mask
with values which match MIPS3_MAX_PCACHE_SIZE (32KB), rather than
leave them actual primary virtual indexed cache size (8KB or 16KB).
Also add comments about what the value means there.
I thought the VCE on R4000/R4400 occurred only if actual virtual alias
was detected because there was an article which mentioned that VCE
detection logic was different according to primary cache size and
it looked reasonable. But all other articles I can find later
(http://www.linux-mips.org/archives/linux-mips/1998-05/msg00084.html etc.)
claimes that VCE detection logic always verifies all 3 bits
between vaddr[14:12] and PIdx[2:0] regardless of primary cache size
(i.e. VCE could occur even if there is no actual virtual alias), and
in fact VCED still happens with the mask values adjusted for 16KB L1
but it doesn't with ones for MIPS3_MAX_PCACHE_SIZE on my R4400 news5000.

diffstat:

 sys/arch/mips/mips/cache.c |  32 +++++++++++++++++++-------------
 1 files changed, 19 insertions(+), 13 deletions(-)

diffs (57 lines):

diff -r a2a94dea89c3 -r 7a36be1fcfdb sys/arch/mips/mips/cache.c
--- a/sys/arch/mips/mips/cache.c        Mon Nov 21 20:03:27 2005 +0000
+++ b/sys/arch/mips/mips/cache.c        Mon Nov 21 20:04:44 2005 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache.c,v 1.26.2.1 2005/11/21 20:02:26 tron Exp $      */
+/*     $NetBSD: cache.c,v 1.26.2.2 2005/11/21 20:04:44 tron Exp $      */
 
 /*
  * Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -68,7 +68,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.26.2.1 2005/11/21 20:02:26 tron Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.26.2.2 2005/11/21 20:04:44 tron Exp $");
 
 #include "opt_cputype.h"
 #include "opt_mips_cache.h"
@@ -681,21 +681,27 @@
        switch (MIPS_PRID_IMPL(cpu_id)) {
 #if defined(MIPS3) || defined(MIPS4)
        case MIPS_R4000:
-#if 0
                /*
-                * R4000/R4400 always detects virtual alias as if
-                * primary cache size is 32KB. Actual primary cache size
-                * is ignored wrt VCED/VCEI.
-                */
-               /*
-                * XXX
-                * It's still better to avoid virtual alias even with VCE,
-                * isn't it?
+                * R4000/R4400 detects virtual alias by VCE as if
+                * its primary cache size were 32KB, because it always
+                * compares 3 bits of vaddr[14:12] which causes
+                * primary cache miss and PIdx[2:0] in the secondary
+                * cache tag regardless of its primary cache size.
+                * i.e. VCE could happen even if there is no actual
+                * virtual alias on its 8KB or 16KB primary cache
+                * which has only 1 or 2 bit valid PIdx in 4KB page.
+                * Actual primary cache size is ignored wrt VCE
+                * and virtual aliases are resolved by the VCE hander,
+                * but it's still worth to avoid unnecessary VCE by
+                * setting alias mask and prefer mask to 32K, though
+                * some other possible aliases (maybe caused by KSEG0
+                * accesses which can't be managed by PMAP_PREFER(9))
+                * will still be resolved by the VCED/VCEI handler.
                 */
                mips_cache_alias_mask =
-                       (MIPS3_MAX_PCACHE_SIZE - 1) & ~(PAGE_SIZE - 1);
+                   (MIPS3_MAX_PCACHE_SIZE - 1) & ~PAGE_MASK;   /* va[14:12] */
                mips_cache_prefer_mask = MIPS3_MAX_PCACHE_SIZE - 1;
-#endif
+
                mips_cache_virtual_alias = 0;
                /* FALLTHROUGH */
        case MIPS_R4600: