[src/trunk]: src/sys/dev/pci Disable legacy io port before the bridge is prob...

[haya <haya%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/b121becb9d39
branches:  trunk
changeset: 477521:b121becb9d39
user:      haya <haya%NetBSD.org@localhost>
date:      Tue Oct 19 09:29:46 1999 +0000

description:
Disable legacy io port before the bridge is probed as a pcic on isa.
Comments ware changed to comply the KNF.
Add PCCBB_PCMCIA_16BITONLY to support TI PCI103X series.

diffstat:

 sys/dev/pci/pccbb.c    |  521 ++++++++++++++++++++++++------------------------
 sys/dev/pci/pccbbvar.h |    3 +-
 2 files changed, 264 insertions(+), 260 deletions(-)

diffs (truncated from 946 to 300 lines):

diff -r ed6fef54a193 -r b121becb9d39 sys/dev/pci/pccbb.c
--- a/sys/dev/pci/pccbb.c       Tue Oct 19 00:49:33 1999 +0000
+++ b/sys/dev/pci/pccbb.c       Tue Oct 19 09:29:46 1999 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pccbb.c,v 1.3 1999/10/15 10:59:58 augustss Exp $       */
+/*     $NetBSD: pccbb.c,v 1.4 1999/10/19 09:29:46 haya Exp $   */
 
 /*
  * Copyright (c) 1998 and 1999 HAYAKAWA Koichi.  All rights reserved.
@@ -29,8 +29,6 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/* $Id: pccbb.c,v 1.3 1999/10/15 10:59:58 augustss Exp $ */
-
 /*
 #define CBB_DEBUG
 #define SHOW_REGS
@@ -270,11 +268,6 @@
   if ((pa->pa_class & PCI_CLASS_INTERFACE_MASK) == PCI_CLASS_INTERFACE_YENTA) {
     /* OK, It must be YENTA PCI-CardBus bridge */
 
-#if 0
-    if (cb_chipset(pa->pa_id, 0, 0) > 0) {
-      return 1;
-    }
-#endif
     return 1;
   }
 
@@ -396,34 +389,26 @@
   struct pccbb_softc *sc = (void *)self;
   struct pci_attach_args *pa = aux;
   pci_chipset_tag_t pc = pa->pa_pc;
-  pcireg_t sock_base;
+  pcireg_t sock_base, busreg;
   bus_addr_t sockbase;
   char const *name;
   int flags;
 
   sc->sc_chipset = cb_chipset(pa->pa_id, &name, &flags);
-  printf(" (%s), flags %d\n", name, flags);
+  printf(" (%s), chipflags %d\n", name, flags);
 
 #if rbus
   sc->sc_rbus_iot = rbus_pccbb_parent_io(pa);
   sc->sc_rbus_memt = rbus_pccbb_parent_mem(pa);
-  /*
-    sc->sc_rbus_iot = pa->pa_rbus_iot;
-    sc->sc_rbus_memt = pa->pa_rbus_memt;
-    */
-#if 0
-  sc->sc_rbus_iot->rb_space_alloc = 
-    pccbb_rb_space_alloc_io(sc->sc_rbus_iot);
-  sc->sc_rbus_iot->rb_space_alloc = 
-    pccbb_rb_space_alloc_mem(sc->sc_rbus_memt);
-#endif /* 0 */
 #endif /* rbus */
 
   sc->sc_base_memh = 0;
 
-  /* MAP socket registers and ExCA registers on memory-space
-     When no valid address is set on socket base registers (on pci
-     config space), get it not polite way */
+  /*
+   * MAP socket registers and ExCA registers on memory-space
+   * When no valid address is set on socket base registers (on pci
+   * config space), get it not polite way.
+   */
   sock_base = pci_conf_read(pc, pa->pa_tag, PCI_SOCKBASE);
 
   if (PCI_MAPREG_MEM_ADDR(sock_base) >= 0x100000 &&
@@ -449,21 +434,30 @@
   }
 
 
-
-#if 1
   sc->sc_mem_start = 0;                /* XXX */
-#else
-  sc->sc_mem_start = CBB_PCI_BASE; /* XXX */
-#endif
   sc->sc_mem_end = 0xffffffff; /* XXX */
   
-  /****** modify Interrupt line ******/
+  /*
+   * When interrupt isn't routed correctly, give up probing cbb and do
+   * not kill pcic-compatible port.
+   */
   if ((0 == pa->pa_intrline) || (255 == pa->pa_intrline)) {
-    printf("changing intrline %d to 10\n", pa->pa_intrline);
-    /* We must ask PCI BIOS for the proper interrupt. */
-    pa->pa_intrline = 10;      /* XXX: no good guess */
+    printf(" Do not use %s because of intr unconfig.\n", sc->sc_dev.dv_xname);
+    return;
   }
 
+  /*
+   * When bus number isn't set correctly, give up using 32-bit CardBus
+   * mode.
+   */
+  busreg = pci_conf_read(pc, pa->pa_tag, PCI_BUSNUM);
+#if notyet
+  if (((busreg >> 8) & 0xff) == 0) {
+    printf(" CardBus on %s will not be configured, because of bus no unconfig.\n", sc->sc_dev.dv_xname);
+    flags |= PCCBB_PCMCIA_16BITONLY;
+  }
+#endif
+
   /* pccbb_machdep.c end */
 
 
@@ -476,7 +470,7 @@
 #endif
 
 
-  /****** setup softc ******/
+  /* setup softc */
   sc->sc_pc = pc;
   sc->sc_iot = pa->pa_iot;
   sc->sc_memt = pa->pa_memt;
@@ -490,6 +484,9 @@
 
   sc->sc_pcmcia_flags = flags; /* set PCMCIA facility */
 
+  /* bus bridge initialisation */
+  pccbb_chipinit(sc);
+
 #if __NetBSD_Version__ > 103060000
   config_defer(self, pccbb_pci_callback);
 #else
@@ -553,8 +550,6 @@
 #endif
   }
 
-  pccbb_chipinit(sc);
-
   base_memt = sc->sc_base_memt;        /* socket regs memory tag */
   base_memh = sc->sc_base_memh;        /* socket regs memory handle */
 
@@ -595,8 +590,10 @@
     }
   }
 
-  /****** attach cardbus ******/
-  {
+  /*
+   * attach cardbus 
+   */
+  if (!(sc->sc_pcmcia_flags & PCCBB_PCMCIA_16BITONLY)) {
     pcireg_t busreg = pci_conf_read(pc, sc->sc_tag, PCI_BUSNUM);
     pcireg_t bhlc = pci_conf_read(pc, sc->sc_tag, PCI_BHLC_REG);
     pcireg_t pci_lscp = pci_conf_read(pc, sc->sc_tag, PCI_CB_LSCP_REG);
@@ -606,11 +603,7 @@
     cba.cba_iot = sc->sc_iot;
     cba.cba_memt = sc->sc_memt;
     cba.cba_dmat = sc->sc_dmat;
-#if 0
-    cba.cba_function = sc->sc_function;
-#else
     cba.cba_function = 0;
-#endif
     cba.cba_bus = (busreg >> 8) & 0x0ff;
     cba.cba_cc = (void *)sc;
     cba.cba_cf = &pccbb_funcs;
@@ -634,7 +627,10 @@
   }
 
   pccbb_pcmcia_attach_setup(sc, &paa);
-  caa.caa_cb_attach = &cba;
+  caa.caa_cb_attach = NULL;
+  if (!(sc->sc_pcmcia_flags & PCCBB_PCMCIA_16BITONLY)) {
+    caa.caa_cb_attach = &cba;
+  }
   caa.caa_16_attach = &paa;
   caa.caa_ph = &sc->sc_pcmcia_h;
 
@@ -659,8 +655,8 @@
   pcireg_t cbctrl;
 
   /*
-     Set PCI command reg.
-     Some laptop's BIOSes (i.e. TICO) do not enable CardBus chip.
+   * Set PCI command reg.
+   * Some laptop's BIOSes (i.e. TICO) do not enable CardBus chip.
    */
   {
     pcireg_t command = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
@@ -668,14 +664,11 @@
     /* I believe it is harmless. */
     command |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
                PCI_COMMAND_MASTER_ENABLE);
-/*
-    pa->pa_flags |= (PCI_FLAGS_MEM_ENABLED | PCI_FLAGS_IO_ENABLED);
-*/
     pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, command);
   }
 
   /*
-     Set CardBus latency timer
+   * Set CardBus latency timer
    */
   {
     pcireg_t pci_lscp = pci_conf_read(pc, tag, PCI_CB_LSCP_REG);
@@ -689,7 +682,7 @@
   }
 
   /*
-     Set PCI latency timer
+   * Set PCI latency timer
    */
   {
     pcireg_t pci_bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
@@ -707,6 +700,12 @@
   switch (sc->sc_chipset) {
   case CB_RF5C46X:             /* fallthrogh */
   case CB_RF5C47X:
+    /*
+     * The legacy pcic io-port on Ricoh CardBus bridges cannot be
+     * disabled by substituting 0 into PCI_LEGACY register.  Ricoh
+     * CardBus bridges have special bits on Bridge control reg (addr
+     * 0x3e on PCI config space).
+     */
     {
       pcireg_t bcri = pci_conf_read(pc, tag, PCI_BCR_INTR);
       bcri &= ~(CB_BCRI_RL_3E0_ENA | CB_BCRI_RL_3E2_ENA);
@@ -721,9 +720,9 @@
 
 
 
-  /****** Interrupt routing ******/
-
-  /* use PCI interrupt */
+  /*
+   * Interrupt routing: use PCI interrupt
+   */
   {
     u_int32_t bcr = pci_conf_read(pc, tag, PCI_BCR_INTR);
     bcr &= ~CB_BCR_INTR_IREQ_ENABLE; /* use PCI Intr */
@@ -759,10 +758,12 @@
     cbctrl = pci_conf_read(pc, tag, PCI_CBCTRL);
     cbctrl &= ~PCI12XX_CBCTRL_INT_MASK;        /* intr routing reset */
     pci_conf_write(pc, tag, PCI_CBCTRL, cbctrl);
-    /* set ExCA regs: PCI12XX required to be set bit 4 at Interrupt
-       and General Register, which is IRQ Enable Register, and clear
-       bit 3:0 to zero in order to route CSC interrupt to PCI
-       interrupt pin. */
+    /*
+     * set ExCA regs: PCI12XX required to be set bit 4 at Interrupt
+     * and General Register, which is IRQ Enable Register, and clear
+     * bit 3:0 to zero in order to route CSC interrupt to PCI
+     * interrupt pin.
+     */
     bus_space_write_1(base_memt, base_memh, 0x0803, 0x10);
     /* set ExCA regs: prohibit all pcmcia-style CSC intr. */
     bus_space_write_1(base_memt, base_memh, 0x0805, 0x00);
@@ -776,7 +777,6 @@
     slot_ctrl = pci_conf_read(pc, tag, TOPIC_SLOT_CTRL);
     DPRINTF(("%s: topic slot ctrl reg 0x%x -> ", sc->sc_dev.dv_xname,
             slot_ctrl));
-//    slot_ctrl &= ~TOPIC_SLOT_CTRL_CLOCK_MASK;
     slot_ctrl |= (TOPIC_SLOT_CTRL_SLOTON | TOPIC_SLOT_CTRL_SLOTEN |
                  TOPIC_SLOT_CTRL_ID_LOCK);
     slot_ctrl |= TOPIC_SLOT_CTRL_CARDBUS;
@@ -800,7 +800,9 @@
 
 
 
-/****** attach pccard bus ******/
+/*
+ * attach pccard bus
+ */
 STATIC void
 pccbb_pcmcia_attach_setup(sc, paa)
      struct pccbb_softc *sc;
@@ -869,12 +871,12 @@
 
 
 
-/**********************************************************************
-* int pccbbintr(arg)
-*    void *arg;
-*   This routine handles the interrupt from Yenta PCI-CardBus bridge
-*   itself.
-**********************************************************************/
+/*
+ * int pccbbintr(arg)
+ *    void *arg;
+ *   This routine handles the interrupt from Yenta PCI-CardBus bridge
+ *   itself.
+ */
 int
 pccbbintr(arg)
      void *arg;
@@ -997,9 +999,9 @@
 
 
 
-/**********************************************************************
-* STATIC int pccbb_ctrl(cardbus_chipset_tag_t, int)