Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/hp300/hp300 Next sweep: stack pointers, FP regs, an...
details: https://anonhg.NetBSD.org/src/rev/b396c62b48cc
branches: trunk
changeset: 477611:b396c62b48cc
user: thorpej <thorpej%NetBSD.org@localhost>
date: Sun Oct 24 19:12:44 1999 +0000
description:
Next sweep: stack pointers, FP regs, and several control registers.
diffstat:
sys/arch/hp300/hp300/locore.s | 590 +++++++++++++++++++++---------------------
1 files changed, 295 insertions(+), 295 deletions(-)
diffs (truncated from 1358 to 300 lines):
diff -r ae1cf58b2ade -r b396c62b48cc sys/arch/hp300/hp300/locore.s
--- a/sys/arch/hp300/hp300/locore.s Sun Oct 24 18:35:25 1999 +0000
+++ b/sys/arch/hp300/hp300/locore.s Sun Oct 24 19:12:44 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.101 1999/10/24 18:35:25 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.102 1999/10/24 19:12:44 thorpej Exp $ */
/*
* Copyright (c) 1994, 1995 Gordon W. Ross
@@ -101,7 +101,7 @@
#define DOREBOOT \
/* Reset Vector Base Register to what PROM expects. */ \
movl #0,%d0; \
- movc %d0,vbr; \
+ movc %d0,%vbr; \
/* Jump to REQ_REBOOT */ \
jmp 0x1A4;
@@ -119,9 +119,9 @@
BSS(esym,4)
ASENTRY_NOPROFILE(start)
- movw #PSL_HIGHIPL,sr | no interrupts
+ movw #PSL_HIGHIPL,%sr | no interrupts
ASRELOC(tmpstk, %a0)
- movl %a0,sp | give ourselves a temporary stack
+ movl %a0,%sp | give ourselves a temporary stack
RELOC(esym, %a0)
#if 1
movl %a4,%a0@ | store end of symbol table
@@ -131,7 +131,7 @@
RELOC(lowram, %a0)
movl %a5,%a0@ | store start of physical memory
movl #CACHE_OFF,%d0
- movc %d0,cacr | clear and disable on-chip cache(s)
+ movc %d0,%cacr | clear and disable on-chip cache(s)
/* check for internal HP-IB in SYSFLAG */
btst #5,0xfffffed2 | internal HP-IB?
@@ -154,8 +154,8 @@
/* determine our CPU/MMU combo - check for all regardless of kernel config */
movl #INTIOBASE+MMUBASE,%a1
movl #0x200,%d0 | data freeze bit
- movc %d0,cacr | only exists on 68030
- movc cacr,%d0 | read it back
+ movc %d0,%cacr | only exists on 68030
+ movc %cacr,%d0 | read it back
tstl %d0 | zero?
jeq Lnot68030 | yes, we have 68020/68040
@@ -214,12 +214,12 @@
Lnot68030:
bset #31,%d0 | data cache enable bit
- movc %d0,cacr | only exists on 68040
- movc cacr,%d0 | read it back
+ movc %d0,%cacr | only exists on 68040
+ movc %cacr,%d0 | read it back
tstl %d0 | zero?
beq Lis68020 | yes, we have 68020
moveq #0,%d0 | now turn it back off
- movec %d0,cacr | before we access any data
+ movec %d0,%cacr | before we access any data
/*
* 68040 models
@@ -340,8 +340,8 @@
movl #0,%a1@(MMUCMD) | clear out MMU again
/* initialize source/destination control registers for movs */
moveq #FC_USERD,%d0 | user space
- movc %d0,sfc | as source
- movc %d0,dfc | and destination of transfers
+ movc %d0,%sfc | as source
+ movc %d0,%dfc | and destination of transfers
/* initialize memory sizes (for pmap_bootstrap) */
movl #MAXADDR,%d1 | last page
moveq #PGSHIFT,%d2
@@ -370,7 +370,7 @@
pea %a4@ | nextpa
RELOC(pmap_bootstrap,%a0)
jbsr %a0@ | pmap_bootstrap(firstpa, nextpa)
- addql #8,sp
+ addql #8,%sp
/*
* Prepare to enable MMU.
@@ -390,13 +390,13 @@
jeq Lhpmmu2 | yes, skip
cmpl #MMU_68040,%a0@ | 68040?
jne Lmotommu1 | no, skip
- .long 0x4e7b1807 | movc %d1,srp
+ .long 0x4e7b1807 | movc %d1,%srp
jra Lstploaddone
Lmotommu1:
RELOC(protorp, %a0)
movl #0x80000202,%a0@ | nolimit + share global + 4 byte PTEs
movl %d1,%a0@(4) | + segtable address
- pmove %a0@,srp | load the supervisor root pointer
+ pmove %a0@,%srp | load the supervisor root pointer
movl #0x80000002,%a0@ | reinit upper half for CRP loads
jra Lstploaddone | done
Lhpmmu2:
@@ -425,7 +425,7 @@
* enabled.
*/
movl #_C_LABEL(vectab),%d0 | set Vector Base Register
- movc %d0,vbr
+ movc %d0,%vbr
RELOC(mmutype, %a0)
tstl %a0@ | HP MMU?
@@ -436,23 +436,23 @@
movw #MMU_IEN+MMU_CEN+MMU_FPE,INTIOBASE+MMUBASE+MMUCMD+2
| enable FPU and caches
moveq #0,%d0 | ensure TT regs are disabled
- .long 0x4e7b0004 | movc %d0,itt0
- .long 0x4e7b0005 | movc %d0,itt1
- .long 0x4e7b0006 | movc %d0,dtt0
- .long 0x4e7b0007 | movc %d0,dtt1
+ .long 0x4e7b0004 | movc %d0,%itt0
+ .long 0x4e7b0005 | movc %d0,%itt1
+ .long 0x4e7b0006 | movc %d0,%dtt0
+ .long 0x4e7b0007 | movc %d0,%dtt1
.word 0xf4d8 | cinva bc
.word 0xf518 | pflusha
movl #0x8000,%d0
- .long 0x4e7b0003 | movc %d0,tc
+ .long 0x4e7b0003 | movc %d0,%tc
movl #0x80008000,%d0
- movc %d0,cacr | turn on both caches
+ movc %d0,%cacr | turn on both caches
jmp Lenab1
Lmotommu2:
movl #MMU_IEN+MMU_FPE,INTIOBASE+MMUBASE+MMUCMD
| enable 68881 and i-cache
RELOC(prototc, %a2)
movl #0x82c0aa00,%a2@ | value to load TC with
- pmove %a2@,tc | load it
+ pmove %a2@,%tc | load it
jmp Lenab1
Lhpmmu3:
movl #0,INTIOBASE+MMUBASE+MMUCMD | clear external cache
@@ -469,30 +469,30 @@
*/
Lenab1:
/* select the software page size now */
- lea _ASM_LABEL(tmpstk),sp | temporary stack
+ lea _ASM_LABEL(tmpstk),%sp | temporary stack
jbsr _C_LABEL(uvm_setpagesize) | select software page size
/* set kernel stack, user SP, and initial pcb */
movl _C_LABEL(proc0paddr),%a1 | get proc0 pcb addr
- lea %a1@(USPACE-4),sp | set kernel stack to end of area
+ lea %a1@(USPACE-4),%sp | set kernel stack to end of area
lea _C_LABEL(proc0),%a2 | initialize proc0.p_addr so that
movl %a1,%a2@(P_ADDR) | we don't deref NULL in trap()
movl #USRSTACK-4,%a2
- movl %a2,usp | init user SP
+ movl %a2,%usp | init user SP
movl %a1,_C_LABEL(curpcb) | proc0 is running
tstl _C_LABEL(fputype) | Have an FPU?
jeq Lenab2 | No, skip.
clrl %a1@(PCB_FPCTX) | ensure null FP context
- movl %a1,sp@-
+ movl %a1,%sp@-
jbsr _C_LABEL(m68881_restore) | restore it (does not kill %a1)
- addql #4,sp
+ addql #4,%sp
Lenab2:
/* flush TLB and turn on caches */
jbsr _C_LABEL(TBIA) | invalidate TLB
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jeq Lnocache0 | yes, cache already on
movl #CACHE_ON,%d0
- movc %d0,cacr | clear cache(s)
+ movc %d0,%cacr | clear cache(s)
tstl _C_LABEL(ectype)
jeq Lnocache0
MMUADDR(%a0)
@@ -506,13 +506,13 @@
* main() nevers returns; we exit to user mode from a forked process
* later on.
*/
- clrw sp@- | vector offset/frame type
- clrl sp@- | PC - filled in by "execve"
- movw #PSL_USER,sp@- | in user mode
- clrl sp@- | stack adjust count and padding
- lea sp@(-64),sp | construct space for D0-D7/A0-A7
+ clrw %sp@- | vector offset/frame type
+ clrl %sp@- | PC - filled in by "execve"
+ movw #PSL_USER,%sp@- | in user mode
+ clrl %sp@- | stack adjust count and padding
+ lea %sp@(-64),%sp | construct space for D0-D7/A0-A7
lea _C_LABEL(proc0),%a0 | save pointer to frame
- movl sp,%a0@(P_MD_REGS) | in proc0.p_md.md_regs
+ movl %sp,%a0@(P_MD_REGS) | in proc0.p_md.md_regs
jra _C_LABEL(main) | main()
PANIC("main() returned")
@@ -523,13 +523,13 @@
* and then rei.
*/
GLOBAL(proc_trampoline)
- movl %a3,sp@- | push function arg
+ movl %a3,%sp@- | push function arg
jbsr %a2@ | call function
- addql #4,sp | pop arg
- movl sp@(FR_SP),%a0 | grab and load
- movl %a0,usp | user SP
- moveml sp@+,#0x7FFF | restore most user regs
- addql #8,sp | toss SP and stack adjust
+ addql #4,%sp | pop arg
+ movl %sp@(FR_SP),%a0 | grab and load
+ movl %a0,%usp | user SP
+ moveml %sp@+,#0x7FFF | restore most user regs
+ addql #8,%sp | toss SP and stack adjust
jra _ASM_LABEL(rei) | and return
@@ -544,35 +544,35 @@
#if defined(M68040) || defined(M68060)
ENTRY_NOPROFILE(addrerr4060)
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,%a0 | save the user SP
- movl %a0,sp@(FR_SP) | in the savearea
- movl sp@(FR_HW+8),sp@-
- clrl sp@- | dummy code
- movl #T_ADDRERR,sp@- | mark address error
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ movl %sp@(FR_HW+8),%sp@-
+ clrl %sp@- | dummy code
+ movl #T_ADDRERR,%sp@- | mark address error
jra _ASM_LABEL(faultstkadj) | and deal with it
#endif
#if defined(M68060)
ENTRY_NOPROFILE(buserr60)
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,%a0 | save the user SP
- movl %a0,sp@(FR_SP) | in the savearea
- movel sp@(FR_HW+12),%d0 | FSLW
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ movel %sp@(FR_HW+12),%d0 | FSLW
btst #2,%d0 | branch prediction error?
jeq Lnobpe
- movc cacr,%d2
+ movc %cacr,%d2
orl #IC60_CABC,%d2 | clear all branch cache entries
- movc %d2,cacr
+ movc %d2,%cacr
movl %d0,%d1
addql #1,L60bpe
andl #0x7ffd,%d1
jeq _ASM_LABEL(faultstkadjnotrap2)
Lnobpe:
| we need to adjust for misaligned addresses
- movl sp@(FR_HW+8),%d1 | grab VA
+ movl %sp@(FR_HW+8),%d1 | grab VA
btst #27,%d0 | check for mis-aligned access
jeq Lberr3 | no, skip
addl #28,%d1 | yes, get into next page
@@ -580,75 +580,75 @@
| instruction case: 4+12+12
andl #PG_FRAME,%d1 | and truncate
Lberr3:
- movl %d1,sp@-
- movl %d0,sp@- | code is FSLW now.
+ movl %d1,%sp@-
+ movl %d0,%sp@- | code is FSLW now.
andw #0x1f80,%d0
jeq Lberr60 | it is a bus error
- movl #T_MMUFLT,sp@- | show that we are an MMU fault
+ movl #T_MMUFLT,%sp@- | show that we are an MMU fault
jra _ASM_LABEL(faultstkadj) | and deal with it
Lberr60:
tstl _C_LABEL(nofault) | catch bus error?
jeq Lisberr | no, handle as usual
- movl sp@(FR_HW+8+8),_C_LABEL(m68k_fault_addr) | save fault addr
- movl _C_LABEL(nofault),sp@- | yes,
+ movl %sp@(FR_HW+8+8),_C_LABEL(m68k_fault_addr) | save fault addr
+ movl _C_LABEL(nofault),%sp@- | yes,
jbsr _C_LABEL(longjmp) | longjmp(nofault)
/* NOTREACHED */
#endif
#if defined(M68040)
ENTRY_NOPROFILE(buserr40)
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,%a0 | save the user SP
- movl %a0,sp@(FR_SP) | in the savearea
- movl sp@(FR_HW+20),%d1 | get fault address
Home |
Main Index |
Thread Index |
Old Index