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[src/trunk]: src/sys/arch/i386/i386 TAB police.
details: https://anonhg.NetBSD.org/src/rev/2b7e02cbef13
branches: trunk
changeset: 584516:2b7e02cbef13
user: simonb <simonb%NetBSD.org@localhost>
date: Thu Sep 22 07:13:27 2005 +0000
description:
TAB police.
diffstat:
sys/arch/i386/i386/machdep.c | 28 ++++++++++++++--------------
1 files changed, 14 insertions(+), 14 deletions(-)
diffs (85 lines):
diff -r f477608eae1f -r 2b7e02cbef13 sys/arch/i386/i386/machdep.c
--- a/sys/arch/i386/i386/machdep.c Thu Sep 22 07:09:35 2005 +0000
+++ b/sys/arch/i386/i386/machdep.c Thu Sep 22 07:13:27 2005 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.564 2005/09/22 06:45:03 dyoung Exp $ */
+/* $NetBSD: machdep.c,v 1.565 2005/09/22 07:13:27 simonb Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2000, 2004 The NetBSD Foundation, Inc.
@@ -72,7 +72,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.564 2005/09/22 06:45:03 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.565 2005/09/22 07:13:27 simonb Exp $");
#include "opt_beep.h"
#include "opt_compat_ibcs2.h"
@@ -792,7 +792,7 @@
int c;
for (c = BEEP_ONHALT_COUNT; c > 0; c--) {
sysbeep(BEEP_ONHALT_PITCH,
- BEEP_ONHALT_PERIOD * hz / 1000);
+ BEEP_ONHALT_PERIOD * hz / 1000);
delay(BEEP_ONHALT_PERIOD * 1000);
sysbeep(0, BEEP_ONHALT_PERIOD * hz / 1000);
delay(BEEP_ONHALT_PERIOD * 1000);
@@ -1006,7 +1006,7 @@
}
#if 0 /* XXX this doesn't work. grr. */
- /* toss any characters present prior to dump */
+ /* toss any characters present prior to dump */
while (sget() != NULL); /*syscons and pccons differ */
#endif
@@ -1223,7 +1223,7 @@
#else
setregion(®ion, idt, NIDT * sizeof(idt[0]) - 1);
#endif
- lidt(®ion);
+ lidt(®ion);
}
#if !defined(REALBASEMEM) && !defined(REALEXTMEM)
@@ -2054,14 +2054,14 @@
/*
* Reset AMD Geode SC1100.
*
- * 1) Write PCI Configuration Address Register (0xcf8) to
- * select Function 0, Register 0x44: Bridge Configuration,
- * GPIO and LPC Configuration Register Space, Reset
- * Control Register.
+ * 1) Write PCI Configuration Address Register (0xcf8) to
+ * select Function 0, Register 0x44: Bridge Configuration,
+ * GPIO and LPC Configuration Register Space, Reset
+ * Control Register.
*
- * 2) Write 0xf to PCI Configuration Data Register (0xcfc)
- * to reset IDE controller, IDE bus, and PCI bus, and
- * to trigger a system-wide reset.
+ * 2) Write 0xf to PCI Configuration Data Register (0xcfc)
+ * to reset IDE controller, IDE bus, and PCI bus, and
+ * to trigger a system-wide reset.
*
* See AMD Geode SC1100 Processor Data Book, Revision 2.0,
* sections 6.3.1, 6.3.2, and 6.4.1.
@@ -2069,7 +2069,7 @@
if (cpu_info_primary.ci_signature == 0x540) {
outl(0xcf8, 0x80009044ul);
outl(0xcfc, 0xf);
- }
+ }
/*
* The keyboard controller has 4 random output pins, one of which is
@@ -2087,7 +2087,7 @@
*/
memset((caddr_t)idt, 0, NIDT * sizeof(idt[0]));
setregion(®ion, idt, NIDT * sizeof(idt[0]) - 1);
- lidt(®ion);
+ lidt(®ion);
__asm __volatile("divl %0,%1" : : "q" (0), "a" (0));
#if 0
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