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[src/nathanw_sa]: src/sys/arch Fix various misspellings of compatible/compati...
details: https://anonhg.NetBSD.org/src/rev/dcb217ede494
branches: nathanw_sa
changeset: 504728:dcb217ede494
user: wiz <wiz%NetBSD.org@localhost>
date: Mon Jun 11 01:50:54 2001 +0000
description:
Fix various misspellings of compatible/compatibility.
diffstat:
sys/arch/m68k/060sp/dist/isp.s | 4309 ++++++++++++++++++++++++++++++++++++++++
sys/arch/m68k/fpsp/x_bsun.sa | 72 +
sys/arch/vax/include/qduser.h | 513 ++++
3 files changed, 4894 insertions(+), 0 deletions(-)
diffs (truncated from 4906 to 300 lines):
diff -r d19565a90317 -r dcb217ede494 sys/arch/m68k/060sp/dist/isp.s
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/m68k/060sp/dist/isp.s Mon Jun 11 01:50:54 2001 +0000
@@ -0,0 +1,4309 @@
+#
+# $NetBSD: isp.s,v 1.2.8.2 2001/06/11 01:50:54 wiz Exp $
+#
+
+#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+# MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
+# M68000 Hi-Performance Microprocessor Division
+# M68060 Software Package Production Release
+#
+# M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
+# All rights reserved.
+#
+# THE SOFTWARE is provided on an "AS IS" basis and without warranty.
+# To the maximum extent permitted by applicable law,
+# MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
+# INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
+# FOR A PARTICULAR PURPOSE and any warranty against infringement with
+# regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
+# and any accompanying written materials.
+#
+# To the maximum extent permitted by applicable law,
+# IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
+# (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+# BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
+# ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
+#
+# Motorola assumes no responsibility for the maintenance and support
+# of the SOFTWARE.
+#
+# You are hereby granted a copyright license to use, modify, and distribute the
+# SOFTWARE so long as this entire notice is retained without alteration
+# in any modified and/or redistributed versions, and that such modified
+# versions are clearly identified as such.
+# No licenses are granted by implication, estoppel or otherwise under any
+# patents or trademarks of Motorola, Inc.
+#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+#
+# ireal.s:
+# This file is appended to the top of the 060ISP package
+# and contains the entry points into the package. The user, in
+# effect, branches to one of the branch table entries located
+# after _060ISP_TABLE.
+# Also, subroutine stubs exist in this file (_isp_done for
+# example) that are referenced by the ISP package itself in order
+# to call a given routine. The stub routine actually performs the
+# callout. The ISP code does a "bsr" to the stub routine. This
+# extra layer of hierarchy adds a slight performance penalty but
+# it makes the ISP code easier to read and more mainatinable.
+#
+
+set _off_chk, 0x00
+set _off_divbyzero, 0x04
+set _off_trace, 0x08
+set _off_access, 0x0c
+set _off_done, 0x10
+
+set _off_cas, 0x14
+set _off_cas2, 0x18
+set _off_lock, 0x1c
+set _off_unlock, 0x20
+
+set _off_imr, 0x40
+set _off_dmr, 0x44
+set _off_dmw, 0x48
+set _off_irw, 0x4c
+set _off_irl, 0x50
+set _off_drb, 0x54
+set _off_drw, 0x58
+set _off_drl, 0x5c
+set _off_dwb, 0x60
+set _off_dww, 0x64
+set _off_dwl, 0x68
+
+_060ISP_TABLE:
+
+# Here's the table of ENTRY POINTS for those linking the package.
+ bra.l _isp_unimp
+ short 0x0000
+
+ bra.l _isp_cas
+ short 0x0000
+
+ bra.l _isp_cas2
+ short 0x0000
+
+ bra.l _isp_cas_finish
+ short 0x0000
+
+ bra.l _isp_cas2_finish
+ short 0x0000
+
+ bra.l _isp_cas_inrange
+ short 0x0000
+
+ bra.l _isp_cas_terminate
+ short 0x0000
+
+ bra.l _isp_cas_restart
+ short 0x0000
+
+ space 64
+
+#############################################################
+
+ global _real_chk
+_real_chk:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_chk,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _real_divbyzero
+_real_divbyzero:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_divbyzero,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _real_trace
+_real_trace:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_trace,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _real_access
+_real_access:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_access,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _isp_done
+_isp_done:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_done,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+#######################################
+
+ global _real_cas
+_real_cas:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_cas,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _real_cas2
+_real_cas2:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_cas2,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _real_lock_page
+_real_lock_page:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_lock,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _real_unlock_page
+_real_unlock_page:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_unlock,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+#######################################
+
+ global _imem_read
+_imem_read:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_imr,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_read
+_dmem_read:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_dmr,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_write
+_dmem_write:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_dmw,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _imem_read_word
+_imem_read_word:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_irw,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _imem_read_long
+_imem_read_long:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_irl,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_read_byte
+_dmem_read_byte:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_drb,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_read_word
+_dmem_read_word:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_drw,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_read_long
+_dmem_read_long:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_drl,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_write_byte
+_dmem_write_byte:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_dwb,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_write_word
+_dmem_write_word:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_dww,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+ global _dmem_write_long
+_dmem_write_long:
+ mov.l %d0,-(%sp)
+ mov.l (_060ISP_TABLE-0x80+_off_dwl,%pc),%d0
+ pea.l (_060ISP_TABLE-0x80,%pc,%d0)
+ mov.l 0x4(%sp),%d0
+ rtd &0x4
+
+#
+# This file contains a set of define statements for constants
+# in oreder to promote readability within the core code itself.
+#
+
+set LOCAL_SIZE, 96 # stack frame size(bytes)
+set LV, -LOCAL_SIZE # stack offset
+
+set EXC_ISR, 0x4 # stack status register
+set EXC_IPC, 0x6 # stack pc
+set EXC_IVOFF, 0xa # stacked vector offset
+
+set EXC_AREGS, LV+64 # offset of all address regs
+set EXC_DREGS, LV+32 # offset of all data regs
+
+set EXC_A7, EXC_AREGS+(7*4) # offset of a7
+set EXC_A6, EXC_AREGS+(6*4) # offset of a6
+set EXC_A5, EXC_AREGS+(5*4) # offset of a5
+set EXC_A4, EXC_AREGS+(4*4) # offset of a4
+set EXC_A3, EXC_AREGS+(3*4) # offset of a3
+set EXC_A2, EXC_AREGS+(2*4) # offset of a2
+set EXC_A1, EXC_AREGS+(1*4) # offset of a1
+set EXC_A0, EXC_AREGS+(0*4) # offset of a0
+set EXC_D7, EXC_DREGS+(7*4) # offset of d7
+set EXC_D6, EXC_DREGS+(6*4) # offset of d6
+set EXC_D5, EXC_DREGS+(5*4) # offset of d5
+set EXC_D4, EXC_DREGS+(4*4) # offset of d4
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