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[src/trunk]: src/sys/arch/mips Correct a few cpu/fpu ids.
details: https://anonhg.NetBSD.org/src/rev/fedd9df2efd5
branches: trunk
changeset: 499695:fedd9df2efd5
user: soren <soren%NetBSD.org@localhost>
date: Mon Nov 27 06:38:54 2000 +0000
description:
Correct a few cpu/fpu ids.
diffstat:
sys/arch/mips/include/cpuregs.h | 8 +++-----
sys/arch/mips/mips/mips_machdep.c | 11 ++++++-----
2 files changed, 9 insertions(+), 10 deletions(-)
diffs (84 lines):
diff -r e9966b9e69fc -r fedd9df2efd5 sys/arch/mips/include/cpuregs.h
--- a/sys/arch/mips/include/cpuregs.h Mon Nov 27 06:37:32 2000 +0000
+++ b/sys/arch/mips/include/cpuregs.h Mon Nov 27 06:38:54 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuregs.h,v 1.37 2000/11/27 06:37:33 nisimura Exp $ */
+/* $NetBSD: cpuregs.h,v 1.38 2000/11/27 06:38:54 soren Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -617,11 +617,12 @@
#define MIPS_R3LSI 0x05 /* LSI Logic R3000 derivative ISA I */
#define MIPS_R6000A 0x06 /* MIPS R6000A ISA II */
#define MIPS_R3IDT 0x07 /* IDT R3041 or RC36100 ISA I */
-#define MIPS_R10000 0x09 /* MIPS R10000/T5 ISA IV */
+#define MIPS_R10000 0x09 /* MIPS R10000 ISA IV */
#define MIPS_R4200 0x0a /* NEC VR4200 ISA III */
#define MIPS_R4300 0x0b /* NEC VR4300 ISA III */
#define MIPS_R4100 0x0c /* NEC VR4100 ISA III */
#define MIPS_R12000 0x0e /* MIPS R12000 ISA IV */
+#define MIPS_R14000 0x0f /* MIPS R14000 ISA IV */
#define MIPS_R8000 0x10 /* MIPS R8000 Blackbird/TFP ISA IV */
#define MIPS_R4600 0x20 /* QED R4600 Orion ISA III */
#define MIPS_R4700 0x21 /* QED R4700 Orion ISA III */
@@ -646,10 +647,7 @@
#define MIPS_R6010 0x04 /* MIPS R6010 FPC ISA II */
#define MIPS_R4010 0x05 /* MIPS R4010 FPC ISA II */
#define MIPS_R31LSI 0x06 /* LSI Logic derivate ISA I */
-#define MIPS_R10010 0x09 /* MIPS R10000/T5 FPU ISA IV */
-#define MIPS_R4210 0x0a /* NEC VR4210 FPC ISA III */
#define MIPS_R3TOSH 0x22 /* Toshiba R3000 based FPU ISA I */
-#define MIPS_R5010 0x23 /* MIPS R5000 FPU ISA IV */
#ifdef ENABLE_MIPS_TX3900
#include <mips/r3900regs.h>
diff -r e9966b9e69fc -r fedd9df2efd5 sys/arch/mips/mips/mips_machdep.c
--- a/sys/arch/mips/mips/mips_machdep.c Mon Nov 27 06:37:32 2000 +0000
+++ b/sys/arch/mips/mips/mips_machdep.c Mon Nov 27 06:38:54 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_machdep.c,v 1.107 2000/10/05 02:36:45 cgd Exp $ */
+/* $NetBSD: mips_machdep.c,v 1.108 2000/11/27 06:38:54 soren Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -52,7 +52,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.107 2000/10/05 02:36:45 cgd Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.108 2000/11/27 06:38:54 soren Exp $");
#include "opt_compat_netbsd.h"
#include "opt_compat_ultrix.h"
@@ -423,6 +423,7 @@
case MIPS_R10000:
case MIPS_R12000:
+ case MIPS_R14000:
cpu_arch = CPU_ARCH_MIPS4;
mips_num_tlb_entries = 64;
mips3_L1TwoWayCache = 1;
@@ -500,11 +501,12 @@
{ MIPS_R3LSI, "LSI Logic R3000 derivative", },
{ MIPS_R6000A, "MIPS R6000A CPU", },
{ MIPS_R3IDT, "IDT R3041 or RC36100 CPU", },
- { MIPS_R10000, "MIPS R10000/T5 CPU", },
+ { MIPS_R10000, "MIPS R10000 CPU", },
{ MIPS_R4200, "NEC VR4200 CPU", },
{ MIPS_R4300, "NEC VR4300 CPU", },
{ MIPS_R4100, "NEC VR4100 CPU", },
{ MIPS_R12000, "MIPS R12000 CPU", },
+ { MIPS_R14000, "MIPS R14000 CPU", },
{ MIPS_R8000, "MIPS R8000 Blackbird/TFP CPU", },
{ MIPS_R4600, "QED R4600 Orion CPU", },
{ MIPS_R4700, "QED R4700 Orion CPU", },
@@ -536,8 +538,7 @@
{ MIPS_R3010, "MIPS R3010 FPC", },
{ MIPS_R6010, "MIPS R6010 FPC", },
{ MIPS_R4010, "MIPS R4010 FPC", },
- { MIPS_R4210, "NEC VR4210 FPC", },
- { MIPS_R5010, "MIPS R5010 FPC", },
+ { MIPS_R10000, "built-in FPU", },
};
/*
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