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[src/trunk]: src/sys/arch/arm/include/arm32 Always disable interrupts at the ...
details: https://anonhg.NetBSD.org/src/rev/6f7eb860a9cf
branches: trunk
changeset: 566088:6f7eb860a9cf
user: scw <scw%NetBSD.org@localhost>
date: Tue Apr 27 07:13:16 2004 +0000
description:
Always disable interrupts at the start of DO_AST_AND_RESTORE_ALIGNMENT_FAULTS.
This addresses #2 of port-arm/23581 by Richard Earnshaw.
Many thanks to Richard for spotting the cause of this problem.
diffstat:
sys/arch/arm/include/arm32/frame.h | 28 +++++++++++++++++-----------
1 files changed, 17 insertions(+), 11 deletions(-)
diffs (72 lines):
diff -r f543b4c98a5c -r 6f7eb860a9cf sys/arch/arm/include/arm32/frame.h
--- a/sys/arch/arm/include/arm32/frame.h Tue Apr 27 06:57:08 2004 +0000
+++ b/sys/arch/arm/include/arm32/frame.h Tue Apr 27 07:13:16 2004 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.10 2003/12/15 09:18:21 scw Exp $ */
+/* $NetBSD: frame.h,v 1.11 2004/04/27 07:13:16 scw Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -200,14 +200,14 @@
#define DO_AST_AND_RESTORE_ALIGNMENT_FAULTS \
ldr r0, [sp] /* Get the SPSR from stack */ ;\
mrs r4, cpsr /* save CPSR */ ;\
+ orr r1, r4, #(I32_bit) ;\
+ msr cpsr_c, r1 /* Disable interrupts */ ;\
and r0, r0, #(PSR_MODE) /* Returning to USR mode? */ ;\
teq r0, #(PSR_USR32_MODE) ;\
ldreq r5, .Laflt_astpending ;\
bne 3f /* Nope, get out now */ ;\
bic r4, r4, #(I32_bit) ;\
-1: orr r0, r4, #(I32_bit) /* Disable IRQs */ ;\
- msr cpsr_c, r0 ;\
- ldr r1, [r5] /* Pending AST? */ ;\
+1: ldr r1, [r5] /* Pending AST? */ ;\
teq r1, #0x00000000 ;\
bne 2f /* Yup. Go deal with it */ ;\
GET_CURPCB_EXIT /* r1 = curpcb, r2 = cpuinfo */ ;\
@@ -225,8 +225,10 @@
str r1, [r5] /* Clear astpending */ ;\
msr cpsr_c, r4 /* Restore interrupts */ ;\
mov r0, sp ;\
- adr lr, 1b ;\
- b _C_LABEL(ast) /* ast(frame) */ ;\
+ bl _C_LABEL(ast) /* ast(frame) */ ;\
+ orr r0, r4, #(I32_bit) /* Disable IRQs */ ;\
+ msr cpsr_c, r0 ;\
+ b 1b /* Back around again */ ;\
3:
#else /* !(COMPAT_15 && EXEC_AOUT) */
@@ -240,22 +242,26 @@
#define DO_AST_AND_RESTORE_ALIGNMENT_FAULTS \
ldr r0, [sp] /* Get the SPSR from stack */ ;\
mrs r4, cpsr /* save CPSR */ ;\
+ orr r1, r4, #(I32_bit) ;\
+ msr cpsr_c, r1 /* Disable interrupts */ ;\
and r0, r0, #(PSR_MODE) /* Returning to USR mode? */ ;\
teq r0, #(PSR_USR32_MODE) ;\
ldreq r5, .Laflt_astpending ;\
bne 2f /* Nope, get out now */ ;\
bic r4, r4, #(I32_bit) ;\
-1: orr r0, r4, #(I32_bit) /* Disable IRQs */ ;\
- msr cpsr_c, r0 ;\
ldr r1, [r5] /* Pending AST? */ ;\
teq r1, #0x00000000 ;\
beq 2f /* Nope. Just bail */ ;\
- mov r1, #0x00000000 ;\
+1: mov r1, #0x00000000 ;\
str r1, [r5] /* Clear astpending */ ;\
msr cpsr_c, r4 /* Restore interrupts */ ;\
mov r0, sp ;\
- adr lr, 1b ;\
- b _C_LABEL(ast) /* ast(frame) */ ;\
+ bl _C_LABEL(ast) /* ast(frame) */ ;\
+ orr r0, r4, #(I32_bit) /* Disable IRQs */ ;\
+ msr cpsr_c, r0 ;\
+ ldr r1, [r5] /* Another pending AST? */ ;\
+ teq r1, #0x00000000 ;\
+ bne 1b /* Yup. Back around again */ ;\
2:
#endif /* COMPAT_15 && EXEC_AOUT */
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