[src/netbsd-1-6]: src/sys/arch/arm/arm Pull up revision 1.51 (requested by th...

[he <he%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c84594ce3a9a
branches:  netbsd-1-6
changeset: 529400:c84594ce3a9a
user:      he <he%NetBSD.org@localhost>
date:      Mon Nov 18 02:19:33 2002 +0000

description:
Pull up revision 1.51 (requested by thorpej in ticket #685):
  If __ARMEB__ is defined, always set CPU_CONTROL_BEND_ENABLE
  in the CPU control register.

diffstat:

 sys/arch/arm/arm/cpufunc.c |  47 ++++++++++++++++++++++++++++++++++++---------
 1 files changed, 37 insertions(+), 10 deletions(-)

diffs (116 lines):

diff -r 75c37a57538b -r c84594ce3a9a sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Mon Nov 18 02:14:55 2002 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Mon Nov 18 02:19:33 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.44.4.3 2002/07/29 14:41:49 lukem Exp $   */
+/*     $NetBSD: cpufunc.c,v 1.44.4.4 2002/11/18 02:19:33 he Exp $      */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -1403,6 +1403,10 @@
        cpuctrl = parse_cpu_options(args, arm678_options, cpuctrl);
        cpuctrl = parse_cpu_options(args, arm6_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Clear out the cache */
        cpu_idcache_wbinv_all();
 
@@ -1444,6 +1448,10 @@
        cpuctrl = parse_cpu_options(args, arm678_options, cpuctrl);
        cpuctrl = parse_cpu_options(args, arm7_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Clear out the cache */
        cpu_idcache_wbinv_all();
 
@@ -1479,6 +1487,10 @@
        cpuctrl = parse_cpu_options(args, arm678_options, cpuctrl);
        cpuctrl = parse_cpu_options(args, arm7tdmi_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Clear out the cache */
        cpu_idcache_wbinv_all();
 
@@ -1523,6 +1535,10 @@
        cpuctrl = parse_cpu_options(args, arm678_options, cpuctrl);
        cpuctrl = parse_cpu_options(args, arm8_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Get clock configuration */
        clocktest = arm8_clock_config(0, 0) & 0x0f;
 
@@ -1600,6 +1616,10 @@
 
        cpuctrl = parse_cpu_options(args, arm9_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Clear out the cache */
        cpu_idcache_wbinv_all();
 
@@ -1647,6 +1667,10 @@
 
        cpuctrl = parse_cpu_options(args, sa110_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Clear out the cache */
        cpu_idcache_wbinv_all();
 
@@ -1700,6 +1724,10 @@
 
        cpuctrl = parse_cpu_options(args, sa11x0_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Clear out the cache */
        cpu_idcache_wbinv_all();
 
@@ -1751,6 +1779,14 @@
 
        cpuctrl = parse_cpu_options(args, xscale_options, cpuctrl);
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
        /* Clear out the cache */
        cpu_idcache_wbinv_all();
 
@@ -1761,14 +1797,5 @@
        curcpu()->ci_ctrl = cpuctrl;
 /*     cpu_control(cpuctrlmask, cpuctrl);*/
        cpu_control(0xffffffff, cpuctrl);
-
-#if 0
-       /*
-        * XXX FIXME
-        * Disable write buffer coalescing, PT ECC, and set
-        * the mini-cache to write-back/read-allocate.
-        */
-       __asm ("mcr p15, 0, %0, c1, c0, 1" :: "r" (0));
-#endif
 }
 #endif /* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 */