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[src/trunk]: src/sys/dev/pci Possibloe fix for some bge chip revisions taking...
details: https://anonhg.NetBSD.org/src/rev/0674ba0ea830
branches: trunk
changeset: 559540:0674ba0ea830
user: jonathan <jonathan%NetBSD.org@localhost>
date: Sat Mar 20 01:58:51 2004 +0000
description:
Possibloe fix for some bge chip revisions taking a long time to reset
(e.g., polling for a half-second or more at splnet(), blocking most
interrupts, durin an ifconfig down/ifconfig up).
Appears to help for a 5704C rev A3, which is the only chip I've
ever seen that had even a mild version of the reported problem.
diffstat:
sys/dev/pci/if_bge.c | 10 ++++++----
sys/dev/pci/if_bgereg.h | 11 ++++++++++-
2 files changed, 16 insertions(+), 5 deletions(-)
diffs (59 lines):
diff -r e241ce3d3499 -r 0674ba0ea830 sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c Sat Mar 20 01:55:00 2004 +0000
+++ b/sys/dev/pci/if_bge.c Sat Mar 20 01:58:51 2004 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.61 2004/03/20 01:42:21 jonathan Exp $ */
+/* $NetBSD: if_bge.c,v 1.62 2004/03/20 01:58:51 jonathan Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.61 2004/03/20 01:42:21 jonathan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.62 2004/03/20 01:58:51 jonathan Exp $");
#include "bpfilter.h"
#include "vlan.h"
@@ -2436,11 +2436,13 @@
for (i = 0; i < BGE_TIMEOUT; i++) {
new_pcistate = pci_conf_read(pa->pa_pc, pa->pa_tag,
BGE_PCI_PCISTATE);
- if (new_pcistate == pcistate)
+ if ((new_pcistate & ~BGE_PCISTATE_RESERVED) ==
+ (pcistate & ~BGE_PCISTATE_RESERVED))
break;
DELAY(10);
}
- if (new_pcistate != pcistate) {
+ if ((new_pcistate & ~BGE_PCISTATE_RESERVED) !=
+ (pcistate & ~BGE_PCISTATE_RESERVED)) {
printf("%s: pcistate failed to revert\n",
sc->bge_dev.dv_xname);
}
diff -r e241ce3d3499 -r 0674ba0ea830 sys/dev/pci/if_bgereg.h
--- a/sys/dev/pci/if_bgereg.h Sat Mar 20 01:55:00 2004 +0000
+++ b/sys/dev/pci/if_bgereg.h Sat Mar 20 01:58:51 2004 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bgereg.h,v 1.17 2004/01/22 02:29:46 jonathan Exp $ */
+/* $NetBSD: if_bgereg.h,v 1.18 2004/03/20 01:58:51 jonathan Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2001
@@ -311,6 +311,15 @@
#define BGE_PCISTATE_PCI_TGT_RETRY_MAX 0x00000E00
/*
+ * The following bits in PCI state register are reserved.
+ * If we check that the register values reverts on reset,
+ * do not check these bits. On some 5704C (rev A3) and some
+ * Altima chips, these bits do not revert until much later
+ * in the bge driver's bge_reset() chip-reset state machine.
+ */
+#define BGE_PCISTATE_RESERVED ((1 << 12) + (1 <<7))
+
+/*
* PCI Clock Control register -- note, this register is read only
* unless the CLOCKCTL_RW bit of the PCI Misc. Host Control
* register is set.
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