Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/netbsd-1-6]: src/sys/arch/i386/i386 Pull up revision 1.3 (requested by f...
details: https://anonhg.NetBSD.org/src/rev/440f779c0b40
branches: netbsd-1-6
changeset: 529486:440f779c0b40
user: tron <tron%NetBSD.org@localhost>
date: Sun Nov 24 15:58:57 2002 +0000
description:
Pull up revision 1.3 (requested by fredb in ticket #734):
Follow AMD's recommendations for programming the uncachable/write-combine
bits of the K6 cache-control-register: disable the cache; flush the cache;
set the bits; re-enable the cache (all much like programming the pentium
mtrr's). See reference posted to tech-kern; also review there by thorpej.
diffstat:
sys/arch/i386/i386/mtrr_k6.c | 11 ++++++++---
1 files changed, 8 insertions(+), 3 deletions(-)
diffs (43 lines):
diff -r b672fbc9e857 -r 440f779c0b40 sys/arch/i386/i386/mtrr_k6.c
--- a/sys/arch/i386/i386/mtrr_k6.c Sun Nov 24 15:54:27 2002 +0000
+++ b/sys/arch/i386/i386/mtrr_k6.c Sun Nov 24 15:58:57 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mtrr_k6.c,v 1.2 2001/11/15 07:03:30 lukem Exp $ */
+/* $NetBSD: mtrr_k6.c,v 1.2.14.1 2002/11/24 15:58:57 tron Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mtrr_k6.c,v 1.2 2001/11/15 07:03:30 lukem Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mtrr_k6.c,v 1.2.14.1 2002/11/24 15:58:57 tron Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -102,10 +102,15 @@
k6_mtrr_reload(void)
{
uint64_t uwccr;
+ uint32_t origcr0, cr0;
int i;
disable_intr();
+ origcr0 = cr0 = rcr0();
+ cr0 |= CR0_CD;
+ lcr0(cr0);
+
wbinvd();
for (i = 0, uwccr = 0; i < MTRR_K6_NVAR; i++) {
@@ -115,7 +120,7 @@
wrmsr(MSR_K6_UWCCR, uwccr);
- wbinvd();
+ lcr0(origcr0);
enable_intr();
}
Home |
Main Index |
Thread Index |
Old Index