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[src/trunk]: src/sys/arch/arc Update some items to reflect reality.
details: https://anonhg.NetBSD.org/src/rev/76a6019b0da5
branches: trunk
changeset: 760584:76a6019b0da5
user: tsutsui <tsutsui%NetBSD.org@localhost>
date: Sat Jan 08 09:44:37 2011 +0000
description:
Update some items to reflect reality.
diffstat:
sys/arch/arc/TODO | 20 ++++----------------
1 files changed, 4 insertions(+), 16 deletions(-)
diffs (74 lines):
diff -r 045b34f379ba -r 76a6019b0da5 sys/arch/arc/TODO
--- a/sys/arch/arc/TODO Sat Jan 08 09:40:05 2011 +0000
+++ b/sys/arch/arc/TODO Sat Jan 08 09:44:37 2011 +0000
@@ -1,11 +1,8 @@
-$NetBSD: TODO,v 1.28 2009/10/21 21:11:59 rmind Exp $
+$NetBSD: TODO,v 1.29 2011/01/08 09:44:37 tsutsui Exp $
To do list (in some particular order)
XXX some entries might be obsolete.
- o install notes
-
-
o use MI driver
- make fd driver MI, and share it with other ports
@@ -15,14 +12,12 @@
XXX needs fixes of DESKstation support
o VXL framebuffer support (Magnum, RISCstation 2200)
+ (Note nowadays QEMU supports Magnum 4000 with VXL)
o com_jazzio.c
- clock handling clean up (obtain from ARC BIOS)
- fifo disabling may be only needed on some Magnum?
- o remove pccons and switch to wscons completely
- (XXX what's the problem to remove pccons?)
-
o AD1848 audio support
o missing MI devices
@@ -36,6 +31,8 @@
- vga/cirrus RISCserver 2200, Express5800/240 R4400 EISA
- vga/??? DESKstation Tyne, rPC44
- TGA RISCstation 2250, Express5800/230 R4400 PCI
+ (TGA support in XalphaNetBSD just works,
+ but needs XOrg'fy)
o Find out why bitmap load to S3-928 flashes screen. (X server)
Know why (enable linear mode). Need S3 info.
@@ -57,7 +54,6 @@
o parse ARC BIOS configuration information and use it
o fix kernel start address
- (maybe requires bootloader support)
o allocate PICA_TL_BASE dynamically
@@ -69,8 +65,6 @@
o intrcnt[] name cleanup, use MI evcnt(9)
- o test and merge soren's clean up about proc0.p_addr.
-
o redesign interrupt handler framework.
o it is better to always disable the MIPS3 internal timer interrupts
@@ -101,15 +95,9 @@
(following entries might be MI MIPS items)
- o make CLKF_INTR() work.
-
o Move the RO and WIRED attribute from the pte to the pv table.
This saves four instructions in the tlb miss handler.
- o Can we have 32 double registers?
-
- o 64bit kernel/userland
-
o clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland.
Lots of other things.....
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