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[src/trunk]: src/sys/arch/emips Bring emips forward to the new mips world order.



details:   https://anonhg.NetBSD.org/src/rev/de286ef3dd2e
branches:  trunk
changeset: 762507:de286ef3dd2e
user:      matt <matt%NetBSD.org@localhost>
date:      Tue Feb 22 08:20:20 2011 +0000

description:
Bring emips forward to the new mips world order.

diffstat:

 sys/arch/emips/conf/files.emips     |   4 +-
 sys/arch/emips/emips/autoconf.c     |   6 +-
 sys/arch/emips/emips/bus_dma.c      |  12 ++---
 sys/arch/emips/emips/cpu.c          |  24 ++++------
 sys/arch/emips/emips/interrupt.c    |  83 ++++++++++--------------------------
 sys/arch/emips/emips/machdep.c      |  24 +--------
 sys/arch/emips/emips/xilinx_ml40x.c |  35 ++++++++------
 sys/arch/emips/emips/xs_bee3.c      |  38 +++++++++-------
 sys/arch/emips/include/intr.h       |  66 +++--------------------------
 sys/arch/emips/include/sysconf.h    |   6 +-
 10 files changed, 99 insertions(+), 199 deletions(-)

diffs (truncated from 676 to 300 lines):

diff -r a1fba3133314 -r de286ef3dd2e sys/arch/emips/conf/files.emips
--- a/sys/arch/emips/conf/files.emips   Tue Feb 22 08:19:47 2011 +0000
+++ b/sys/arch/emips/conf/files.emips   Tue Feb 22 08:20:20 2011 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.emips,v 1.1 2011/01/26 01:18:50 pooka Exp $
+#      $NetBSD: files.emips,v 1.2 2011/02/22 08:20:20 matt Exp $
 # eMIPS-specific configuration info
 
 # maxpartitions must be first item in files.${ARCH}.
@@ -98,8 +98,6 @@
 
 file   common/bus_dma/bus_dmamem_common.c
 
-file   arch/mips/mips/softintr.c
-
 #
 # Workstation console devices
 #
diff -r a1fba3133314 -r de286ef3dd2e sys/arch/emips/emips/autoconf.c
--- a/sys/arch/emips/emips/autoconf.c   Tue Feb 22 08:19:47 2011 +0000
+++ b/sys/arch/emips/emips/autoconf.c   Tue Feb 22 08:20:20 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: autoconf.c,v 1.2 2011/02/08 20:20:11 rmind Exp $       */
+/*     $NetBSD: autoconf.c,v 1.3 2011/02/22 08:20:20 matt Exp $        */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.2 2011/02/08 20:20:11 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.3 2011/02/22 08:20:20 matt Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -74,7 +74,7 @@
        (*platform.bus_reset)();
 
        /* Configuration is finished, turn on interrupts. */
-       _splnone();     /* enable all source forcing SOFT_INTs cleared */
+       spl0();         /* enable all source forcing SOFT_INTs cleared */
 }
 
 /*
diff -r a1fba3133314 -r de286ef3dd2e sys/arch/emips/emips/bus_dma.c
--- a/sys/arch/emips/emips/bus_dma.c    Tue Feb 22 08:19:47 2011 +0000
+++ b/sys/arch/emips/emips/bus_dma.c    Tue Feb 22 08:20:20 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bus_dma.c,v 1.1 2011/01/26 01:18:50 pooka Exp $        */
+/*     $NetBSD: bus_dma.c,v 1.2 2011/02/22 08:20:20 matt Exp $ */
 
 /*-
  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.1 2011/01/26 01:18:50 pooka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.2 2011/02/22 08:20:20 matt Exp $");
 
 #include "opt_cputype.h"
 
@@ -470,7 +470,7 @@
         * NOTE: Even though this is `wbinv_all', since the cache is
         * write-though, it just invalidates it.
         */
-       if (len >= mips_pdcache_size) {
+       if (len >= mips_cache_info.mci_pdcache_size) {
                mips_dcache_wbinv_all();
                return;
        }
@@ -658,12 +658,10 @@
     bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
     int flags)
 {
-       extern paddr_t avail_start, avail_end;          /* XXX */
-
        return (_bus_dmamem_alloc_range_common(t, size, alignment, boundary,
                                               segs, nsegs, rsegs, flags,
-                                              avail_start /*low*/,
-                                              avail_end - PAGE_SIZE /*high*/));
+                                              mips_avail_start /*low*/,
+                                              mips_avail_end - PAGE_SIZE /*high*/));
 }
 
 /*
diff -r a1fba3133314 -r de286ef3dd2e sys/arch/emips/emips/cpu.c
--- a/sys/arch/emips/emips/cpu.c        Tue Feb 22 08:19:47 2011 +0000
+++ b/sys/arch/emips/emips/cpu.c        Tue Feb 22 08:20:20 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.1 2011/01/26 01:18:50 pooka Exp $ */
+/* $NetBSD: cpu.c,v 1.2 2011/02/22 08:20:20 matt Exp $ */
 
 /*
  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -28,7 +28,9 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.1 2011/01/26 01:18:50 pooka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.2 2011/02/22 08:20:20 matt Exp $");
+
+#include "ioconf.h"
 
 #include <sys/param.h>
 #include <sys/device.h>
@@ -38,18 +40,14 @@
 
 #include <machine/autoconf.h>
 
-static int     cpumatch __P((struct device *, struct cfdata *, void *));
-static void    cpuattach __P((struct device *, struct device *, void *));
+static int     cpumatch(device_t, cfdata_t, void *);
+static void    cpuattach(device_t, device_t, void *);
 
-CFATTACH_DECL(cpu, sizeof (struct device),
+CFATTACH_DECL_NEW(cpu, 0,
     cpumatch, cpuattach, NULL, NULL);
-extern struct cfdriver cpu_cd;
 
 static int
-cpumatch(parent, cf, aux)
-       struct device *parent;
-       struct cfdata *cf;
-       void *aux;
+cpumatch(device_t parent, cfdata_t cf, void *aux)
 {
        struct mainbus_attach_args *ma = aux;
 
@@ -61,11 +59,9 @@
 }
 
 static void
-cpuattach(parent, dev, aux)
-       struct device *parent, *dev;
-       void *aux;
+cpuattach(device_t parent, device_t self, void *aux)
 {
 
        printf(": ");
-       cpu_identify();
+       cpu_identify(self);
 }
diff -r a1fba3133314 -r de286ef3dd2e sys/arch/emips/emips/interrupt.c
--- a/sys/arch/emips/emips/interrupt.c  Tue Feb 22 08:19:47 2011 +0000
+++ b/sys/arch/emips/emips/interrupt.c  Tue Feb 22 08:20:20 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: interrupt.c,v 1.1 2011/01/26 01:18:50 pooka Exp $      */
+/*     $NetBSD: interrupt.c,v 1.2 2011/02/22 08:20:20 matt Exp $       */
 
 /*-
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.1 2011/01/26 01:18:50 pooka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.2 2011/02/22 08:20:20 matt Exp $");
 
 #include <sys/param.h>
 #include <sys/device.h>
@@ -41,6 +41,7 @@
 
 #include <mips/psl.h>
 
+#include <machine/locore.h>
 #include <machine/autoconf.h>
 #include <machine/sysconf.h>
 #include <machine/intr.h>
@@ -55,8 +56,6 @@
 struct evcnt emips_memerr_evcnt =
     EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "memerr", "intr");
 
-extern void MachFPInterrupt(unsigned, unsigned, unsigned, struct frame *);
-
 static const char * const intrnames[MAX_DEV_NCOOKIES] = {
        "int-0", "int-1", "int-2", "int-3", "int-4",
        "int-5", "int-6", "int-7", "int-8", "int-9",
@@ -73,29 +72,27 @@
        int i;
 
        if (phase == 0) {
-               for (i = 0; i < MAX_DEV_NCOOKIES; i++)
+               for (i = 0; i < MAX_DEV_NCOOKIES; i++) {
                        evcnt_attach_dynamic(&intrtab[i].ih_count,
                            EVCNT_TYPE_INTR, NULL, "emips", intrnames[i]);
+               }
                return;
        }
 
        if (phase == 1) {
                /* I am trying to make this standard so its here. Bah. */
-               struct mips1_tlb {
-                       u_int32_t tlb_hi;
-                       u_int32_t tlb_lo;
-               } tlb;
-               void mips1_TLBWrite(int, struct mips1_tlb *);
+               struct tlbmask tlb;
 
     /* This is ugly but efficient. Sigh. */
 #define TheAic ((struct _Aic *)INTERRUPT_CONTROLLER_DEFAULT_ADDRESS)
 
                tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
-               tlb.tlb_lo = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
-               mips1_TLBWrite(4, &tlb);
+               tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
+               tlb_write_indexed(4, &tlb);
+
                tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
-               tlb.tlb_lo = TIMER_DEFAULT_ADDRESS | 0xf02;
-               mips1_TLBWrite(5, &tlb);
+               tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
+               tlb_write_indexed(5, &tlb);
        }
 }
 
@@ -103,49 +100,29 @@
  * emips uses one line for all I/O interrupts (0x8000).
  */
 void
-cpu_intr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
+cpu_intr(int ppl, uint32_t status, vaddr_t pc)
 {
+       uint32_t ipending;
+       int ipl;
 
        curcpu()->ci_data.cpu_nintr++;
 
-       /* device interrupts */
-       if (ipending & MIPS_INT_MASK_5) {
-               (*platform.iointr)(status, cause, pc, ipending);
+       while (ppl < (ipl = splintr(&ipending))) {
+               splx(ipl);
+               /* device interrupts */
+               if (ipending & MIPS_INT_MASK_5) {
+                       (*platform.iointr)(status, pc, ipending);
+               }
+               (void)splhigh();
        }
-
-#ifdef notyet
-       ipending &= (MIPS_SOFT_INT_MASK_1|MIPS_SOFT_INT_MASK_0);
-       if (ipending == 0)
-               return;
-
-       _clrsoftintr(ipending);
-       mips_softint_dispatch(ipending);
-#endif
-}
-
-/* Rightmost 1. BUGBUG optimize in assembly
- */
-static int __inline Rightmost1(uint32_t Val);
-
-static int __inline Rightmost1(uint32_t Val)
-{
-    uint32_t Mask;
-
-    Mask = Val & -Val;
-    return ((Mask & 0xFFFF0000)!=0) << 4
-         | ((Mask & 0xFF00FF00)!=0) << 3
-         | ((Mask & 0xF0F0F0F0)!=0) << 2
-         | ((Mask & 0xCCCCCCCC)!=0) << 1
-         | ((Mask & 0xAAAAAAAA)!=0);
 }
 
 /*
  * Interrupt dispatcher for standard AIC-style interrupt controller
  */
 void
-emips_aic_intr(unsigned status, unsigned cause, unsigned pc, unsigned ipending)
+emips_aic_intr(uint32_t status, vaddr_t pc, uint32_t ipending)
 {
-       int index;
        struct clockframe cf;
 
        cf.pc = pc;
@@ -155,15 +132,12 @@
 
        while (ipending) {
                /* Take one (most likely, the only one) */
-               index = Rightmost1(ipending);
-               ipending = ipending & ~(1 << index);
+               int index = ffs(ipending) - 1;
+               ipending &= ~(1 << index);
 
                intrtab[index].ih_count.ev_count++;
                (*intrtab[index].ih_func)(intrtab[index].ih_arg, &cf);
        }
-
-       /* Not so sure about this. Why dont we just return and reload status? */
-       _splset(MIPS_SR_INT_IE | (status & ~(cause & MIPS_HARD_INT_MASK)));
 }
 
 
@@ -186,12 +160,3 @@
        /* Third, enable and done.  */
        TheAic->IrqEnable = 1 << index;
 }



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