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[src/trunk]: src/sys/arch/mips Fix printing of watch{lo, hi} and make mipsNN_w...
details: https://anonhg.NetBSD.org/src/rev/e56acebac1b0
branches: trunk
changeset: 764271:e56acebac1b0
user: matt <matt%NetBSD.org@localhost>
date: Thu Apr 14 17:43:07 2011 +0000
description:
Fix printing of watch{lo,hi} and make mipsNN_watchlo_* use intptr_t so that
sign extention happens.
diffstat:
sys/arch/mips/include/locore.h | 6 +++---
sys/arch/mips/mips/db_interface.c | 23 ++++++++---------------
2 files changed, 11 insertions(+), 18 deletions(-)
diffs (64 lines):
diff -r 65a2ae89e55b -r e56acebac1b0 sys/arch/mips/include/locore.h
--- a/sys/arch/mips/include/locore.h Thu Apr 14 17:42:00 2011 +0000
+++ b/sys/arch/mips/include/locore.h Thu Apr 14 17:43:07 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.88 2011/04/14 05:08:22 cliff Exp $ */
+/* $NetBSD: locore.h,v 1.89 2011/04/14 17:43:07 matt Exp $ */
/*
* This file should not be included by MI code!!!
@@ -148,8 +148,8 @@
uint32_t mipsNN_cp0_config2_read(void);
uint32_t mipsNN_cp0_config3_read(void);
-uintptr_t mipsNN_cp0_watchlo_read(u_int);
-void mipsNN_cp0_watchlo_write(u_int, uintptr_t);
+intptr_t mipsNN_cp0_watchlo_read(u_int);
+void mipsNN_cp0_watchlo_write(u_int, intptr_t);
uint32_t mipsNN_cp0_watchhi_read(u_int);
void mipsNN_cp0_watchhi_write(u_int, uint32_t);
diff -r 65a2ae89e55b -r e56acebac1b0 sys/arch/mips/mips/db_interface.c
--- a/sys/arch/mips/mips/db_interface.c Thu Apr 14 17:42:00 2011 +0000
+++ b/sys/arch/mips/mips/db_interface.c Thu Apr 14 17:43:07 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.72 2011/04/14 09:25:05 matt Exp $ */
+/* $NetBSD: db_interface.c,v 1.73 2011/04/14 17:43:07 matt Exp $ */
/*
* Mach Operating System
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.72 2011/04/14 09:25:05 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.73 2011/04/14 17:43:07 matt Exp $");
#include "opt_multiprocessor.h"
#include "opt_cputype.h" /* which mips CPUs do we support? */
@@ -466,19 +466,12 @@
#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0
for (int i=0; i < curcpu()->ci_cpuwatch_count; i++) {
- uint32_t r = mipsNN_cp0_watchlo_read(i);
- printf(" %s%d:%*s %#x\n", "watchlo", i, FLDWIDTH - 8, "", r);
- }
- for (int i=0; i < curcpu()->ci_cpuwatch_count; i++) {
- if (CPUIS64BITS) {
- uint32_t r = mipsNN_cp0_watchhi_read(i);
- printf(" %s%d:%*s %#x\n",
- "watchhi", i, FLDWIDTH - 8, "", r);
- } else {
- uint64_t r = mipsNN_cp0_watchhi_read(i);
- printf(" %s%d:%*s %#" PRIx64 "\n",
- "watchhi", i, FLDWIDTH - 8, "", r);
- }
+ const intptr_t lo = mipsNN_cp0_watchlo_read(i);
+ const uint32_t hi = mipsNN_cp0_watchhi_read(i);
+ printf(" %s%d:%*s %#" PRIxPTR "\t",
+ "watchlo", i, FLDWIDTH - 8, "", lo);
+ printf(" %s%d:%*s %#" PRIx32 "\n",
+ "watchhi", i, FLDWIDTH - 8, "", hi);
}
#endif
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