[src/trunk]: src/sys/uvm Turn PMAP_NOCACHE into MI flag.

[cegger <cegger%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/b5b449d1ff14
branches:  trunk
changeset: 756108:b5b449d1ff14
user:      cegger <cegger%NetBSD.org@localhost>
date:      Tue Jul 06 21:11:22 2010 +0000

description:
Turn PMAP_NOCACHE into MI flag.
Add MI flags PMAP_WRITE_COMBINE, PMAP_WRITE_BACK, PMAP_NOCACHE_OVR.
Update pmap(9) manpage.

hppa: Remove MD PMAP_NOCACHE flag as it exists as MI flag
mips: Rename MD PMAP_NOCACHE to PGC_NOCACHE.

x86: Implement new MI flags using Page-Attribute Tables.
x86: Implement BUS_SPACE_MAP_PREFETCHABLE.

Patch presented on tech-kern@:
http://mail-index.netbsd.org/tech-kern/2010/06/30/msg008458.html

No comments on this last version.
Forgot to commit this in previous.

diffstat:

 sys/uvm/uvm_pmap.h |  25 +++++++++++++++++++++++--
 1 files changed, 23 insertions(+), 2 deletions(-)

diffs (39 lines):

diff -r 74e86e644e02 -r b5b449d1ff14 sys/uvm/uvm_pmap.h
--- a/sys/uvm/uvm_pmap.h        Tue Jul 06 20:50:33 2010 +0000
+++ b/sys/uvm/uvm_pmap.h        Tue Jul 06 21:11:22 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: uvm_pmap.h,v 1.32 2009/11/07 07:27:50 cegger Exp $     */
+/*     $NetBSD: uvm_pmap.h,v 1.33 2010/07/06 21:11:22 cegger Exp $     */
 
 /*
  * Copyright (c) 1991, 1993
@@ -109,7 +109,28 @@
 #define        PMAP_KMPAGE     0x00000000
 #endif /* PMAP_ENABLE_PMAP_KMPAGE */
 
-#define        PMAP_MD_MASK    0xff000000      /* Machine-dependent bits */
+#define        PMAP_MD_MASK    0xff000000      /* [BOTH] Machine-dependent bits */
+#define PMAP_PROT_MASK 0x0000000f      /* [BOTH] VM_PROT_* bit mask */
+
+/*
+ * Cache Type Encodings
+ */
+#define PMAP_CACHE_MASK                0x00000f00
+
+/* All accesses are uncacheable. No speculative accesses. */
+#define PMAP_NOCACHE           0x00000100      /* [BOTH] */
+
+/* All accesses are uncacheable. No speculative accesses.
+ * Writes are combined. */
+#define PMAP_WRITE_COMBINE     0x00000200      /* [BOTH] */
+
+/* On reads, cachelines become shared or exclusive if allocated on cache miss.
+ * On writes, cachelines become modified on a cache miss.  */
+#define PMAP_WRITE_BACK                0x00000300      /* [BOTH] */
+
+/* = PMAP_NOCACHE but overrideable (e.g. on x86 by MTRRs) */
+#define PMAP_NOCACHE_OVR       0x00000400      /* [BOTH] */
+
 
 #ifndef PMAP_EXCLUDE_DECLS     /* Used in Sparc port to virtualize pmap mod */
 #ifdef _KERNEL