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[src/trunk]: src/sys/arch/sparc64/include add some control registers found on...
details: https://anonhg.NetBSD.org/src/rev/a3a45d5f729d
branches: trunk
changeset: 763274:a3a45d5f729d
user: mrg <mrg%NetBSD.org@localhost>
date: Wed Mar 16 02:35:48 2011 +0000
description:
add some control registers found on the Fire and Jupiter busses.
from openbsd.
diffstat:
sys/arch/sparc64/include/ctlreg.h | 10 +++++++++-
1 files changed, 9 insertions(+), 1 deletions(-)
diffs (24 lines):
diff -r 7eba0fd53ca6 -r a3a45d5f729d sys/arch/sparc64/include/ctlreg.h
--- a/sys/arch/sparc64/include/ctlreg.h Wed Mar 16 02:34:10 2011 +0000
+++ b/sys/arch/sparc64/include/ctlreg.h Wed Mar 16 02:35:48 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ctlreg.h,v 1.54 2010/12/18 05:45:43 mrg Exp $ */
+/* $NetBSD: ctlreg.h,v 1.55 2011/03/16 02:35:48 mrg Exp $ */
/*
* Copyright (c) 1996-2002 Eduardo Horvath
@@ -210,6 +210,14 @@
#else
#define CPU_UPAID UPA_CR_MID(ldxa(0, ASI_MID_REG))
#endif
+
+/* Get the CPU's Fireplane agent ID */
+#define FIREPLANE_CR_AID(x) (((x) >> 17) & 0x3ff)
+#define CPU_FIREPLANEID FIREPLANE_CR_AID(ldxa(0, ASI_MID_REG))
+
+/* Get the CPU's Jupiter Bus interrupt target ID */
+#define JUPITER_CR_ITID(x) ((x) & 0x3ff)
+#define CPU_JUPITERID JUPITER_CR_ITID(ldxa(0, ASI_MID_REG))
/*
* [4u] MMU and Cache Control Register (MCCR)
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