[src/trunk]: src/sys/arch/mips implement ucas_* for mips.

[chs <chs%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/20c9e73ef05f
branches:  trunk
changeset: 756127:20c9e73ef05f
user:      chs <chs%NetBSD.org@localhost>
date:      Wed Jul 07 01:19:09 2010 +0000

description:
implement ucas_* for mips.

diffstat:

 sys/arch/mips/include/asm.h     |    4 +-
 sys/arch/mips/mips/lock_stubs.S |  108 ++++++++++++++++++++++++++++++++++++---
 2 files changed, 101 insertions(+), 11 deletions(-)

diffs (190 lines):

diff -r 54182f6d15d7 -r 20c9e73ef05f sys/arch/mips/include/asm.h
--- a/sys/arch/mips/include/asm.h       Wed Jul 07 01:18:39 2010 +0000
+++ b/sys/arch/mips/include/asm.h       Wed Jul 07 01:19:09 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: asm.h,v 1.41 2009/12/14 00:46:04 matt Exp $    */
+/*     $NetBSD: asm.h,v 1.42 2010/07/07 01:19:09 chs Exp $     */
 
 /*
  * Copyright (c) 1992, 1993
@@ -615,7 +615,7 @@
 #endif
 
 /* See lock_stubs.S. */
-#define        MIPS_LOCK_RAS_SIZE      128
+#define        MIPS_LOCK_RAS_SIZE      256
 
 #define        CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off)
 
diff -r 54182f6d15d7 -r 20c9e73ef05f sys/arch/mips/mips/lock_stubs.S
--- a/sys/arch/mips/mips/lock_stubs.S   Wed Jul 07 01:18:39 2010 +0000
+++ b/sys/arch/mips/mips/lock_stubs.S   Wed Jul 07 01:19:09 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: lock_stubs.S,v 1.11 2010/01/09 11:49:16 simonb Exp $   */
+/*     $NetBSD: lock_stubs.S,v 1.12 2010/07/07 01:19:09 chs Exp $      */
 
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -33,6 +33,7 @@
 #include "opt_lockdebug.h"
 #include "opt_multiprocessor.h"
 
+#include <sys/errno.h>
 #include <machine/asm.h>
 #include <machine/cpu.h>
 
@@ -137,6 +138,62 @@
 STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_uint)
 STRONG_ALIAS(atomic_cas_uint_ni,_atomic_cas_uint)
 
+/*
+ * int ucas_32(volatile int32_t *uptr, int32_t old, int32_t new, int32_t *ret);
+ */
+LEAF(ucas_32)
+       blt     a0, zero, 4f
+        PTR_L  v1, L_PCB(MIPS_CURLWP)
+       PTR_LA  v0, 3f
+       PTR_S   v0, PCB_ONFAULT(v1)
+1:
+       ll      t0, (a0)
+       bne     t0, a1, 2f
+        move   t1, a2
+       sc      t1, (a0)
+       beq     t1, zero, 1b
+2:
+        INT_S  t0, (a3)
+       move    v0, zero
+3:
+       j       ra
+        PTR_S  zero, PCB_ONFAULT(v1)
+4:
+       b       3b
+        li     v0, EFAULT
+END(ucas_32)
+STRONG_ALIAS(ucas_int,ucas_32)
+
+/*
+ * int ucas_64(volatile int64_t *uptr, int64_t old, int64_t new, int64_t *ret);
+ */
+LEAF(ucas_64)
+       blt     a0, zero, 4f
+        PTR_L  v1, L_PCB(MIPS_CURLWP)
+       PTR_LA  v0, 3f
+       PTR_S   v0, PCB_ONFAULT(v1)
+1:
+       lld     t0, (a0)
+       bne     t0, a1, 2f
+        move   t1, a2
+       scd     t1, (a0)
+       beq     t1, zero, 1b
+2:
+        INT_S  t0, (a3)
+       move    v0, zero
+3:
+       j       ra
+        PTR_S  zero, PCB_ONFAULT(v1)
+4:
+       b       3b
+        li     v0, EFAULT
+END(ucas_64)
+#ifdef _LP64
+STRONG_ALIAS(ucas_ptr,ucas_64)
+#else
+STRONG_ALIAS(ucas_ptr,ucas_32)
+#endif
+
 #ifndef LOCKDEBUG
 
 /*
@@ -237,11 +294,11 @@
  *   top of _lock_ras() for why).  The entry is defined here as the
  *   point after where a restart occurs if we trap within the section.
  *
- * o The entire code block is aligned on a 128 byte boundary, and is
- *   128 bytes in size.  This is to allow us to do an pessimistic check
+ * o The entire code block is aligned on a 256 byte boundary, and is
+ *   256 bytes in size.  This is to allow us to do an pessimistic check
  *   after taking a trap with:
  *
- *     if ((addr & ~127) == _lock_ras_start)
+ *     if ((addr & ~255) == _lock_ras_start)
  *             addr = _lock_ras(addr);
  *
  *   See definition of MIPS_LOCK_RAS_SIZE in asm.h.
@@ -259,7 +316,7 @@
  *     unsigned long old, unsigned long new);
  */
        .text
-       .align  7
+       .align  8
 
 EXPORT(_lock_ras_start)
 
@@ -296,13 +353,43 @@
 STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_ulong)
 STRONG_ALIAS(atomic_cas_ptr_ni,_atomic_cas_ulong)
 
+/*
+ * int ucas_32(volatile int32_t *uptr, int32_t old, int32_t new, int32_t *ret);
+ */
+       nop
+       nop
+LEAF_NOPROFILE(ucas_32)
+       blt     a0, zero, 4f
+        PTR_L  v1, L_PCB(MIPS_CURLWP)
+       PTR_LA  v0, 3f
+       PTR_S   v0, PCB_ONFAULT(v1)
+       lw      t0, (a0)                /* <- critical section start */
+_ucas_32_start:
+       nop
+       bne     t0, a1, 2f
+        nop
+       sw      a2, (a0)                /* <- critical section end */
+2:
+       sw      t0, (a3)
+       move    v0, zero
+3:
+       j       ra
+        PTR_S  zero, PCB_ONFAULT(v1)
+4:
+       b       3b
+        li     v0, EFAULT
+END(ucas_32)
+STRONG_ALIAS(ucas_int,ucas_32)
+#ifdef _LP64
+#else
+STRONG_ALIAS(ucas_ptr,ucas_32)
+#endif
+
 #ifndef LOCKDEBUG
 /*
  * int mutex_enter(kmutex_t *mtx);
  */
        nop
-       nop
-       nop
 LEAF_NOPROFILE(mutex_enter)
        PTR_L   t0, (a0)        /* <- critical section start */
 _mutex_enter_start:
@@ -335,7 +422,7 @@
 END(mutex_exit)
         nop
 
-       .align  7                       /* Get out of the RAS block */
+       .align  8                       /* Get out of the RAS block */
 
 /*
  * void        mutex_spin_enter(kmutex_t *mtx);
@@ -405,8 +492,11 @@
        la      t0, _atomic_cas_start
        beq     t2, t0, 1f
         nop
+       addiu   t0, _ucas_32_start - _atomic_cas_start
+       beq     t2, t0, 1f
+        nop
 #ifndef LOCKDEBUG
-       addiu   t0, _mutex_enter_start - _atomic_cas_start
+       addiu   t0, _mutex_enter_start - _ucas_32_start
        beq     t2, t0, 1f
         nop
        addiu   t0, _mutex_exit_start - _mutex_enter_start