[src/trunk]: src/sys/arch/x86/acpi Add support for AMD family 12h. Also rever...

[jruoho <jruoho%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/696d1824321c
branches:  trunk
changeset: 771227:696d1824321c
user:      jruoho <jruoho%NetBSD.org@localhost>
date:      Tue Nov 15 07:20:30 2011 +0000

description:
Add support for AMD family 12h. Also revert revision 1.67, as it implies
maintenance burden for limited value. XXX: Need to add family 15h too.

diffstat:

 sys/arch/x86/acpi/acpi_cpu_md.c |  65 +++-------------------------------------
 1 files changed, 5 insertions(+), 60 deletions(-)

diffs (121 lines):

diff -r 37dab20817dc -r 696d1824321c sys/arch/x86/acpi/acpi_cpu_md.c
--- a/sys/arch/x86/acpi/acpi_cpu_md.c   Tue Nov 15 00:50:55 2011 +0000
+++ b/sys/arch/x86/acpi/acpi_cpu_md.c   Tue Nov 15 07:20:30 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_cpu_md.c,v 1.68 2011/10/18 05:08:24 jruoho Exp $ */
+/* $NetBSD: acpi_cpu_md.c,v 1.69 2011/11/15 07:20:30 jruoho Exp $ */
 
 /*-
  * Copyright (c) 2010, 2011 Jukka Ruohonen <jruohonen%iki.fi@localhost>
@@ -27,7 +27,7 @@
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.68 2011/10/18 05:08:24 jruoho Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.69 2011/11/15 07:20:30 jruoho Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -68,7 +68,7 @@
 #define MSR_CMPHALT_BMSTS      __BIT(29)
 
 /*
- * AMD families 10h, 11h, and 14h
+ * AMD families 10h, 11h, 12h, and 14h.
  */
 #define MSR_10H_LIMIT          0xc0010061
 #define MSR_10H_CONTROL                0xc0010062
@@ -107,7 +107,6 @@
 void           (*native_idle)(void) = NULL;
 
 static int      acpicpu_md_quirk_piix4(const struct pci_attach_args *);
-static void     acpicpu_md_quirk_amd(struct acpicpu_pstate *, uint32_t);
 static void     acpicpu_md_pstate_hwf_reset(void *, void *);
 static int      acpicpu_md_pstate_fidvid_get(struct acpicpu_softc *,
                                               uint32_t *);
@@ -274,6 +273,7 @@
 
                        /* FALLTHROUGH */
 
+               case 0x12:
                case 0x14: /* AMD Fusion */
 
                        /*
@@ -336,55 +336,6 @@
        return 0;
 }
 
-static void
-acpicpu_md_quirk_amd(struct acpicpu_pstate *ps, uint32_t i)
-{
-       struct cpu_info *ci = &cpu_info_primary;
-       uint32_t family, fid, freq, did, zeta;
-       uint64_t val;
-
-       if (i > 7 || cpu_vendor != CPUVENDOR_AMD)
-               return;
-
-       family = CPUID2FAMILY(ci->ci_signature);
-
-       if (family == 0xf)
-               family += CPUID2EXTFAMILY(ci->ci_signature);
-
-       switch (family) {
-
-       case 0x10:
-               zeta = 0x10;
-               break;
-
-       case 0x11:
-               zeta = 0x08;
-               break;
-
-       default:
-               return;
-       }
-
-       /*
-        * The following eight P-state control MSRs define
-        * the static per-core values; the MSB indicates
-        * whether the state is enabled, and the first eight
-        * bits define the frequency divisor and multiplier.
-        */
-       val = rdmsr(MSR_10H_CONFIG + i);
-
-       if ((val & __BIT(63)) == 0)
-               return;
-
-       fid = __SHIFTOUT(val, __BITS(0, 5));
-       did = __SHIFTOUT(val, __BITS(6, 8));
-
-       freq = 100 * (fid + zeta) >> did;
-
-       if (freq != 0 && ps->ps_freq != freq)
-               ps->ps_freq = freq;
-}
-
 void
 acpicpu_md_quirk_c1e(void)
 {
@@ -600,6 +551,7 @@
 
                case 0x10:
                case 0x11:
+               case 0x12:
                case 0x14: /* AMD Fusion */
                        msr.ps_control_addr = MSR_10H_CONTROL;
                        msr.ps_control_mask = __BITS(0, 2);
@@ -647,13 +599,6 @@
                if (msr.ps_control_mask != 0)
                        ps->ps_control_mask = msr.ps_control_mask;
 
-               /*
-                * Some AMD systems may round the frequencies
-                * reported in the tables. Try to fix these.
-                */
-               if (cpu_vendor == CPUVENDOR_AMD)
-                       acpicpu_md_quirk_amd(ps, i);
-
                i++;
        }