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[src/netbsd-6]: src/sys/arch/sparc64/sparc64 Pull up following revision(s) (r...
details: https://anonhg.NetBSD.org/src/rev/51a41d645730
branches: netbsd-6
changeset: 776513:51a41d645730
user: bouyer <bouyer%NetBSD.org@localhost>
date: Sat Dec 14 19:33:28 2013 +0000
description:
Pull up following revision(s) (requested by nakayama in ticket #994):
sys/arch/sparc64/sparc64/locore.s: revision 1.350
Increase an interrupt depth only in the case of hardware interrupts,
and remove the ci_idepth trick in softint_fastintr.
Fixes the following diagnostic panic reported in port-sparc64.
panic: kernel diagnostic assertion "!cpu_intr_p()" failed: file
"../../../../kern/subr_xcall.c", line 351
diffstat:
sys/arch/sparc64/sparc64/locore.s | 35 +++++++++++++++++------------------
1 files changed, 17 insertions(+), 18 deletions(-)
diffs (91 lines):
diff -r 546e251cf9e1 -r 51a41d645730 sys/arch/sparc64/sparc64/locore.s
--- a/sys/arch/sparc64/sparc64/locore.s Sat Dec 14 19:31:17 2013 +0000
+++ b/sys/arch/sparc64/sparc64/locore.s Sat Dec 14 19:33:28 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.338.8.4 2013/02/08 20:58:17 riz Exp $ */
+/* $NetBSD: locore.s,v 1.338.8.5 2013/12/14 19:33:28 bouyer Exp $ */
/*
* Copyright (c) 2006-2010 Matthew R. Green
@@ -3284,12 +3284,6 @@
LDPTR [%g3 + %lo(CPUINFO_VA+CI_TICK_IH)], %g5
0:
- ! Increment the per-cpu interrupt level
- sethi %hi(CPUINFO_VA+CI_IDEPTH), %g1
- ld [%g1 + %lo(CPUINFO_VA+CI_IDEPTH)], %g2
- inc %g2
- st %g2, [%g1 + %lo(CPUINFO_VA+CI_IDEPTH)]
-
#ifdef TRAPSTATS
sethi %hi(_C_LABEL(kintrcnt)), %g1
sethi %hi(_C_LABEL(uintrcnt)), %g2
@@ -3378,6 +3372,17 @@
wrpr %l6, %pil
+#define SOFTINT_INT \
+ (1<<IPL_SOFTCLOCK|1<<IPL_SOFTBIO|1<<IPL_SOFTNET|1<<IPL_SOFTSERIAL)
+
+ ! Increment the per-cpu interrupt depth in case of hardintrs
+ btst SOFTINT_INT, %l3
+ bnz,pn %icc, sparc_intr_retry
+ sethi %hi(CPUINFO_VA+CI_IDEPTH), %l1
+ ld [%l1 + %lo(CPUINFO_VA+CI_IDEPTH)], %l2
+ inc %l2
+ st %l2, [%l1 + %lo(CPUINFO_VA+CI_IDEPTH)]
+
sparc_intr_retry:
wr %l3, 0, CLEAR_SOFTINT ! (don't clear possible %tick IRQ)
sethi %hi(CPUINFO_VA+CI_INTRPENDING), %l4
@@ -3477,11 +3482,14 @@
bnz,pn %icc, sparc_intr_retry
mov 1, %l5 ! initialize intr count for next run
- ! Decrement this cpu's interrupt depth
- sethi %hi(CPUINFO_VA+CI_IDEPTH), %l4
+ ! Decrement this cpu's interrupt depth in case of hardintrs
+ btst SOFTINT_INT, %l3
+ bnz,pn %icc, 1f
+ sethi %hi(CPUINFO_VA+CI_IDEPTH), %l4
ld [%l4 + %lo(CPUINFO_VA+CI_IDEPTH)], %l5
dec %l5
st %l5, [%l4 + %lo(CPUINFO_VA+CI_IDEPTH)]
+1:
#ifdef NOT_DEBUG
set _C_LABEL(intrdebug), %o2
@@ -5233,11 +5241,8 @@
set CPUINFO_VA, %l0 ! l0 = curcpu()
rdpr %pil, %l7 ! l7 = splhigh()
wrpr %g0, PIL_HIGH, %pil
- ld [%l0 + CI_IDEPTH], %l1
LDPTR [%l0 + CI_EINTSTACK], %l6 ! l6 = ci_eintstack
- dec %l1
add %sp, -CC64FSZ, %l2 ! ci_eintstack = sp - CC64FSZ
- st %l1, [%l0 + CI_IDEPTH] ! adjust ci_idepth
STPTR %l2, [%l0 + CI_EINTSTACK] ! save intstack for nexted intr
mov %i0, %o0 ! o0/i0 = softint lwp
@@ -5282,10 +5287,7 @@
restore ! rewind register window
- ld [%l0 + CI_IDEPTH], %l1
STPTR %l6, [%l0 + CI_EINTSTACK] ! restore ci_eintstack
- inc %l1
- st %l1, [%l0 + CI_IDEPTH] ! re-adjust ci_idepth
wrpr %g0, %l7, %pil ! restore ipl
ret
restore %g0, 1, %o0
@@ -5309,10 +5311,7 @@
st %o1, [%l0 + CI_MTX_COUNT]
st %g0, [%o0 + L_CTXSWTCH] ! prev->l_ctxswtch = 0
- ld [%l0 + CI_IDEPTH], %l1
STPTR %l6, [%l0 + CI_EINTSTACK] ! restore ci_eintstack
- inc %l1
- st %l1, [%l0 + CI_IDEPTH] ! re-adjust ci_idepth
wrpr %g0, %l7, %pil ! restore ipl
ret
restore %g0, 1, %o0
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