[src/trunk]: src/sys/arch/luna68k Sync _delay() with hp300:

[tsutsui <tsutsui%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4a411c339b69
branches:  trunk
changeset: 770989:4a411c339b69
user:      tsutsui <tsutsui%NetBSD.org@localhost>
date:      Sat Nov 05 15:33:18 2011 +0000

description:
Sync _delay() with hp300:
 - unsigned -> u_int
 - use ENTRY_NOPROFILE()
 - align main delay loop with 8 byte cacheline boundary

diffstat:

 sys/arch/luna68k/include/param.h  |   4 ++--
 sys/arch/luna68k/luna68k/locore.s |  16 +++++++++++++---
 2 files changed, 15 insertions(+), 5 deletions(-)

diffs (57 lines):

diff -r ed9d5a962c40 -r 4a411c339b69 sys/arch/luna68k/include/param.h
--- a/sys/arch/luna68k/include/param.h  Sat Nov 05 15:27:51 2011 +0000
+++ b/sys/arch/luna68k/include/param.h  Sat Nov 05 15:33:18 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: param.h,v 1.11 2011/02/08 20:20:16 rmind Exp $ */
+/* $NetBSD: param.h,v 1.12 2011/11/05 15:33:18 tsutsui Exp $ */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -70,7 +70,7 @@
 #define delay(us)      _delay((us)<<8)
 #define DELAY(n)       delay(n)
 
-void _delay(unsigned);
+void _delay(u_int);
 #endif /* _KERNEL && !_LOCORE */
 
 #endif /* !_MACHINE_PARAM_H_ */
diff -r ed9d5a962c40 -r 4a411c339b69 sys/arch/luna68k/luna68k/locore.s
--- a/sys/arch/luna68k/luna68k/locore.s Sat Nov 05 15:27:51 2011 +0000
+++ b/sys/arch/luna68k/luna68k/locore.s Sat Nov 05 15:33:18 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.40 2011/11/05 15:27:51 tsutsui Exp $ */
+/* $NetBSD: locore.s,v 1.41 2011/11/05 15:33:18 tsutsui Exp $ */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -1023,17 +1023,27 @@
        rts
 
 /*
- * _delay(unsigned N)
+ * _delay(u_int N)
  *
  * Delay for at least (N/256) microseconds.
  * This routine depends on the variable:  delay_divisor
  * which should be set based on the CPU clock rate.
  */
-GLOBAL(_delay)
+ENTRY_NOPROFILE(_delay)
        | %d0 = arg = (usecs << 8)
        movl    %sp@(4),%d0
        | %d1 = delay_divisor
        movl    _C_LABEL(delay_divisor),%d1
+       jra     L_delay                 /* Jump into the loop! */
+
+       /*
+        * Align the branch target of the loop to a half-line (8-byte)
+        * boundary to minimize cache effects.  This guarantees both
+        * that there will be no prefetch stalls due to cache line burst
+        * operations and that the loop will run from a single cache
+        * half-line.
+        */
+       .align  8
 L_delay:
        subl    %d1,%d0
        jgt     L_delay