[src/netbsd-6]: src/sys/dev/pci Apply patch (requested by msaitoh in ticket #...

[riz <riz%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/09bda259d3a8
branches:  netbsd-6
changeset: 776959:09bda259d3a8
user:      riz <riz%NetBSD.org@localhost>
date:      Sun Apr 19 17:01:50 2015 +0000

description:
Apply patch (requested by msaitoh in ticket #1292):
sys/dev/pci/if_wm.c                             1.313-1.314 and 1.316 via patch

        Fix a bug that the first access to NVM is failed on 8254[17] which use
        SPI EEPROM. Observed on Dell PowerEdge [12]850.
        Thanks Tom Ivar Helbekkmo for debugging.

        Fix a bug that wm_sgmii_writereg() function doesn't pass the "val"
        argument to the I2CCMD register. Reported by Bernard Merindol
        in PR#49789.

        Fix a bug that newer revision of I218-{LM,V} use wrong PHY access
        functions. The problem only occured on devices that the PCI device ID
        was 0x15a[0123].
        [msaitoh, ticket #1292]

diffstat:

 sys/dev/pci/if_wm.c |  36 +++++++++++++++---------------------
 1 files changed, 15 insertions(+), 21 deletions(-)

diffs (110 lines):

diff -r 4d8896a396c0 -r 09bda259d3a8 sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c       Sun Apr 19 05:58:46 2015 +0000
+++ b/sys/dev/pci/if_wm.c       Sun Apr 19 17:01:50 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wm.c,v 1.227.2.16 2015/04/16 06:20:08 snj Exp $     */
+/*     $NetBSD: if_wm.c,v 1.227.2.17 2015/04/19 17:01:50 riz Exp $     */
 
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.227.2.16 2015/04/16 06:20:08 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.227.2.17 2015/04/19 17:01:50 riz Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -1713,6 +1713,7 @@
        case WM_T_82541_2:
        case WM_T_82547:
        case WM_T_82547_2:
+               sc->sc_flags |= WM_F_EEPROM_HANDSHAKE;
                reg = CSR_READ(sc, WMREG_EECD);
                if (reg & EECD_EE_TYPE) {
                        /* SPI */
@@ -1728,7 +1729,6 @@
                                sc->sc_nvm_addrbits = 6;
                        }
                }
-               sc->sc_flags |= WM_F_EEPROM_HANDSHAKE;
                break;
        case WM_T_82571:
        case WM_T_82572:
@@ -6842,8 +6842,9 @@
         *  For some devices, we can determine the PHY access method
         * from sc_type.
         *
-        *  For ICH8 variants, it's difficult to determine the PHY access
-        * method by sc_type, so use the PCI product ID for some devices.
+        *  For ICH and PCH variants, it's difficult to determine the PHY
+        * access  method by sc_type, so use the PCI product ID for some
+        * devices.
         * For other ICH8 variants, try to use igp's method. If the PHY
         * can't detect, then use bm's method.
         */
@@ -6852,30 +6853,16 @@
        case PCI_PRODUCT_INTEL_PCH_M_LC:
                /* 82577 */
                sc->sc_phytype = WMPHY_82577;
-               mii->mii_readreg = wm_gmii_hv_readreg;
-               mii->mii_writereg = wm_gmii_hv_writereg;
                break;
        case PCI_PRODUCT_INTEL_PCH_D_DM:
        case PCI_PRODUCT_INTEL_PCH_D_DC:
                /* 82578 */
                sc->sc_phytype = WMPHY_82578;
-               mii->mii_readreg = wm_gmii_hv_readreg;
-               mii->mii_writereg = wm_gmii_hv_writereg;
                break;
        case PCI_PRODUCT_INTEL_PCH2_LV_LM:
        case PCI_PRODUCT_INTEL_PCH2_LV_V:
                /* 82579 */
                sc->sc_phytype = WMPHY_82579;
-               mii->mii_readreg = wm_gmii_hv_readreg;
-               mii->mii_writereg = wm_gmii_hv_writereg;
-               break;
-       case PCI_PRODUCT_INTEL_I217_LM:
-       case PCI_PRODUCT_INTEL_I217_V:
-       case PCI_PRODUCT_INTEL_I218_LM:
-       case PCI_PRODUCT_INTEL_I218_V:
-               /* I21[78] */
-               mii->mii_readreg = wm_gmii_hv_readreg;
-               mii->mii_writereg = wm_gmii_hv_writereg;
                break;
        case PCI_PRODUCT_INTEL_82801I_BM:
        case PCI_PRODUCT_INTEL_82801J_R_BM_LM:
@@ -6912,6 +6899,11 @@
                }
                break;
        }
+       if ((sc->sc_type >= WM_T_PCH) && (sc->sc_type <= WM_T_PCH_LPT)) {
+               /* All PCH* use _hv_ */
+               mii->mii_readreg = wm_gmii_hv_readreg;
+               mii->mii_writereg = wm_gmii_hv_writereg;
+       }
        mii->mii_statchg = wm_gmii_statchg;
 
        wm_gmii_reset(sc);
@@ -7644,16 +7636,18 @@
        struct wm_softc *sc = device_private(self);
        uint32_t i2ccmd;
        int i;
+       int val_swapped;
 
        if (wm_get_swfw_semaphore(sc, swfwphysem[sc->sc_funcid])) {
                aprint_error_dev(sc->sc_dev, "%s: failed to get semaphore\n",
                    __func__);
                return;
        }
-
+       /* Swap the data bytes for the I2C interface */
+       val_swapped = ((val >> 8) & 0x00FF) | ((val << 8) & 0xFF00);
        i2ccmd = (reg << I2CCMD_REG_ADDR_SHIFT)
            | (phy << I2CCMD_PHY_ADDR_SHIFT)
-           | I2CCMD_OPCODE_WRITE;
+           | I2CCMD_OPCODE_WRITE | val_swapped;
        CSR_WRITE(sc, WMREG_I2CCMD, i2ccmd);
 
        /* Poll the ready bit */