[src/netbsd-6]: src/sys/arch/powerpc Pull up following revision(s) (requested...

[bouyer <bouyer%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f16b303eb63a
branches:  netbsd-6
changeset: 776995:f16b303eb63a
user:      bouyer <bouyer%NetBSD.org@localhost>
date:      Sun Nov 15 16:36:57 2015 +0000

description:
Pull up following revision(s) (requested by matt in ticket #1310):
        sys/arch/powerpc/include/userret.h: revision 1.30
        sys/arch/powerpc/powerpc/fpu.c: revision 1.36
        sys/arch/powerpc/include/psl.h: revision 1.20
        sys/arch/powerpc/include/userret.h: revision 1.29
        sys/arch/powerpc/oea/oea_machdep.c: revision 1.72
        sys/arch/powerpc/oea/altivec.c: revision 1.30
Add a check to make sure that if PSL_FP is set, we own the FPU.
Don't clear PSL_FP/PSL_VEC
Don't reload if just re-enabling
Don't reload the FPU register if this is just a re-enable.
Remove PSL_SPV from BOOKE PSL_USERMOD
Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.

diffstat:

 sys/arch/powerpc/include/psl.h     |   4 +-
 sys/arch/powerpc/include/userret.h |   5 ++-
 sys/arch/powerpc/oea/altivec.c     |  40 +++++++++++++++++++------------------
 sys/arch/powerpc/oea/oea_machdep.c |  11 +++------
 sys/arch/powerpc/powerpc/fpu.c     |  20 ++++++++++--------
 5 files changed, 41 insertions(+), 39 deletions(-)

diffs (189 lines):

diff -r dac9de33edae -r f16b303eb63a sys/arch/powerpc/include/psl.h
--- a/sys/arch/powerpc/include/psl.h    Sun Nov 15 16:33:26 2015 +0000
+++ b/sys/arch/powerpc/include/psl.h    Sun Nov 15 16:36:57 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: psl.h,v 1.18 2011/06/20 07:23:36 matt Exp $    */
+/*     $NetBSD: psl.h,v 1.18.8.1 2015/11/15 16:36:57 bouyer Exp $      */
 
 /*
  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -111,7 +111,7 @@
 #elif defined(PPC_BOOKE)
 #define        PSL_USERSET             (PSL_EE | PSL_PR | PSL_IS | PSL_DS | PSL_ME | PSL_CE | PSL_DE)
 #define        PSL_USERMASK            (PSL_SPV | PSL_CE | 0xFFFF)
-#define        PSL_USERMOD             (PSL_SPV)
+#define        PSL_USERMOD             (0)
 #else /* PPC_IBM4XX */
 #ifdef PPC_IBM403
 #define        PSL_USERSET             (PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_ME)
diff -r dac9de33edae -r f16b303eb63a sys/arch/powerpc/include/userret.h
--- a/sys/arch/powerpc/include/userret.h        Sun Nov 15 16:33:26 2015 +0000
+++ b/sys/arch/powerpc/include/userret.h        Sun Nov 15 16:36:57 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: userret.h,v 1.22.8.1 2012/06/13 19:44:11 riz Exp $     */
+/*     $NetBSD: userret.h,v 1.22.8.2 2015/11/15 16:36:57 bouyer Exp $  */
 
 /*
  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -58,7 +58,8 @@
        /* Invoke MI userret code */
        mi_userret(l);
 
-       tf->tf_srr1 &= PSL_USERSRR1;    /* clear SRR1 status bits */
+       /* clear SRR1 status bits */
+       tf->tf_srr1 &= (PSL_USERSRR1|PSL_FP|PSL_VEC);
 
 #ifdef ALTIVEC
        /*
diff -r dac9de33edae -r f16b303eb63a sys/arch/powerpc/oea/altivec.c
--- a/sys/arch/powerpc/oea/altivec.c    Sun Nov 15 16:33:26 2015 +0000
+++ b/sys/arch/powerpc/oea/altivec.c    Sun Nov 15 16:36:57 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: altivec.c,v 1.25 2011/06/07 01:01:43 matt Exp $        */
+/*     $NetBSD: altivec.c,v 1.25.8.1 2015/11/15 16:36:57 bouyer Exp $  */
 
 /*
  * Copyright (C) 1996 Wolfgang Solfrank.
@@ -32,7 +32,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: altivec.c,v 1.25 2011/06/07 01:01:43 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: altivec.c,v 1.25.8.1 2015/11/15 16:36:57 bouyer Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -82,18 +82,26 @@
                vec_mark_used(l);
        }
 
-       /*
-        * Enable AltiVec temporarily (and disable interrupts).
-        */
-       const register_t msr = mfmsr();
-       mtmsr((msr & ~PSL_EE) | PSL_VEC);
-       __asm volatile ("isync");
+       if ((flags & PCU_REENABLE) == 0) {
+               /*
+                * Enable AltiVec temporarily (and disable interrupts).
+                */
+               const register_t msr = mfmsr();
+               mtmsr((msr & ~PSL_EE) | PSL_VEC);
+               __asm volatile ("isync");
 
-       /*
-        * Load the vector unit from vreg which is best done in
-        * assembly.
-        */
-       vec_load_from_vreg(&pcb->pcb_vr);
+               /*
+                * Load the vector unit from vreg which is best done in
+                * assembly.
+                */
+               vec_load_from_vreg(&pcb->pcb_vr);
+
+               /*
+                * Restore MSR (turn off AltiVec)
+                */
+               mtmsr(msr);
+               __asm volatile ("isync");
+       }
 
        /*
         * VRSAVE will be restored when trap frame returns
@@ -101,12 +109,6 @@
        l->l_md.md_utf->tf_vrsave = pcb->pcb_vr.vrsave;
 
        /*
-        * Restore MSR (turn off AltiVec)
-        */
-       mtmsr(msr);
-       __asm volatile ("isync");
-
-       /*
         * Mark vector registers as modified.
         */
        l->l_md.md_flags |= MDLWP_USEDVEC|PSL_VEC;
diff -r dac9de33edae -r f16b303eb63a sys/arch/powerpc/oea/oea_machdep.c
--- a/sys/arch/powerpc/oea/oea_machdep.c        Sun Nov 15 16:33:26 2015 +0000
+++ b/sys/arch/powerpc/oea/oea_machdep.c        Sun Nov 15 16:36:57 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: oea_machdep.c,v 1.63 2012/02/15 01:56:57 macallan Exp $        */
+/*     $NetBSD: oea_machdep.c,v 1.63.2.1 2015/11/15 16:36:57 bouyer Exp $      */
 
 /*
  * Copyright (C) 2002 Matt Thomas
@@ -33,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.63 2012/02/15 01:56:57 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.63.2.1 2015/11/15 16:36:57 bouyer Exp $");
 
 #include "opt_ppcarch.h"
 #include "opt_compat_netbsd.h"
@@ -391,19 +391,16 @@
 
         /*
         * Configure a PSL user mask matching this processor.
+        * Don't allow to set PSL_FP/PSL_VEC, since that will affect PCU.
         */
        cpu_psluserset = PSL_EE | PSL_PR | PSL_ME | PSL_IR | PSL_DR | PSL_RI;
-       cpu_pslusermod = PSL_FP | PSL_FE0 | PSL_FE1 | PSL_LE | PSL_SE | PSL_BE;
+       cpu_pslusermod = PSL_FE0 | PSL_FE1 | PSL_LE | PSL_SE | PSL_BE;
 #ifdef PPC_OEA601
        if (cpuvers == MPC601) {
                cpu_psluserset &= PSL_601_MASK;
                cpu_pslusermod &= PSL_601_MASK;
        }
 #endif
-#ifdef ALTIVEC
-       if (cpu_altivec)
-               cpu_pslusermod |= PSL_VEC;
-#endif
 #ifdef PPC_HIGH_VEC
        cpu_psluserset |= PSL_IP;       /* XXX ok? */
 #endif
diff -r dac9de33edae -r f16b303eb63a sys/arch/powerpc/powerpc/fpu.c
--- a/sys/arch/powerpc/powerpc/fpu.c    Sun Nov 15 16:33:26 2015 +0000
+++ b/sys/arch/powerpc/powerpc/fpu.c    Sun Nov 15 16:36:57 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu.c,v 1.31 2011/06/07 01:01:43 matt Exp $    */
+/*     $NetBSD: fpu.c,v 1.31.8.1 2015/11/15 16:36:57 bouyer Exp $      */
 
 /*
  * Copyright (C) 1996 Wolfgang Solfrank.
@@ -32,7 +32,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.31 2011/06/07 01:01:43 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.31.8.1 2015/11/15 16:36:57 bouyer Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -85,15 +85,17 @@
                fpu_mark_used(l);
        }
 
-       const register_t msr = mfmsr();
-        mtmsr((msr & ~PSL_EE) | PSL_FP);
-       __asm volatile ("isync");
+       if ((flags & PCU_REENABLE) == 0) {
+               const register_t msr = mfmsr();
+               mtmsr((msr & ~PSL_EE) | PSL_FP);
+               __asm volatile ("isync");
 
-       fpu_load_from_fpreg(&pcb->pcb_fpu);
-       __asm volatile ("sync");
+               fpu_load_from_fpreg(&pcb->pcb_fpu);
+               __asm volatile ("sync");
 
-       mtmsr(msr);
-       __asm volatile ("isync");
+               mtmsr(msr);
+               __asm volatile ("isync");
+       }
 
        curcpu()->ci_ev_fpusw.ev_count++;
        l->l_md.md_utf->tf_srr1 |= PSL_FP|(pcb->pcb_flags & (PCB_FE0|PCB_FE1));