Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/x86/x86 Some core i7 CPUs report model 0c. In this ...
details: https://anonhg.NetBSD.org/src/rev/453129f2c911
branches: trunk
changeset: 756935:453129f2c911
user: jym <jym%NetBSD.org@localhost>
date: Sun Aug 08 00:48:46 2010 +0000
description:
Some core i7 CPUs report model 0c. In this case, check for the extended
model value.
Required to avoid faulting on rdmsr(MSR_FSB_FREQ) early during boot.
Will ask for a pull-up. This affects GENERIC, and most likely, install iso
too.
XXX quick hack. Obtaining FSB through ACPI should be cleaner.
diffstat:
sys/arch/x86/x86/intel_busclock.c | 20 ++++++++++++++++----
1 files changed, 16 insertions(+), 4 deletions(-)
diffs (48 lines):
diff -r b8c06de33f6a -r 453129f2c911 sys/arch/x86/x86/intel_busclock.c
--- a/sys/arch/x86/x86/intel_busclock.c Sun Aug 08 00:44:38 2010 +0000
+++ b/sys/arch/x86/x86/intel_busclock.c Sun Aug 08 00:48:46 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intel_busclock.c,v 1.10 2010/05/23 19:00:28 christos Exp $ */
+/* $NetBSD: intel_busclock.c,v 1.11 2010/08/08 00:48:46 jym Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.10 2010/05/23 19:00:28 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.11 2010/08/08 00:48:46 jym Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -97,7 +97,19 @@
case 0x9: /* Pentium M (130 nm, Banias) */
bus_clock = 10000;
break;
- case 0xc: /* Atom, model 1 */
+ case 0xc: /* Core i7, Atom, model 1 */
+ /*
+ * XXX (See also case 0xe)
+ * Some core i7 CPUs can report model 0xc.
+ * Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
+ * In the long-term, use ACPI instead of all this.
+ */
+ switch (CPUID2EXTMODEL(ci->ci_signature)) {
+ case 0x2:
+ aprint_debug("%s: unable to determine bus speed",
+ device_xname(ci->ci_dev));
+ goto print_msr;
+ }
msr = rdmsr(MSR_FSB_FREQ);
bus = (msr >> 0) & 0x7;
switch (bus) {
@@ -128,7 +140,7 @@
break;
case 0xe: /* Core Duo/Solo */
/*
- * XXX
+ * XXX (See also case 0xc)
* Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
* In the long-term, use ACPI instead of all this.
*/
Home |
Main Index |
Thread Index |
Old Index